Commit 7f8e9767 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/power: Use the intel_de_wait_ms() out value 



Utilize the 'out_value' output parameter of intel_de_wait_ms()
instead of re-reading the PHY_CONTROL register after polling
has finished.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251110172756.2132-16-ville.syrjala@linux.intel.com


Reviewed-by: default avatarSuraj Kandpal <suraj.kandpal@intel.com>
Acked-by: default avatarJani Nikula <jani.nikula@intel.com>
parent d7659d92

drivers/gpu/drm/i915/display/intel_display_power_well.c

+3 −3
Original line number Diff line number Diff line
@@ -1358,6 +1358,7 @@ static void assert_chv_phy_status(struct intel_display *display) 
	u32 phy_control = display->power.chv_phy_control;

	u32 phy_status = 0;

	u32 phy_status_mask = 0xffffffff;

	u32 val;



	/*

	 * The BIOS can leave the PHY is some weird state
@@ -1446,11 +1447,10 @@ static void assert_chv_phy_status(struct intel_display *display) 
	 * so the power state can take a while to actually change.

	 */

	if (intel_de_wait_ms(display, DISPLAY_PHY_STATUS,

			     phy_status_mask, phy_status, 10, NULL))

			     phy_status_mask, phy_status, 10, &val))

		drm_err(display->drm,

			"Unexpected PHY_STATUS 0x%08x, expected 0x%08x (PHY_CONTROL=0x%08x)\n",

			intel_de_read(display, DISPLAY_PHY_STATUS) & phy_status_mask,

			phy_status, display->power.chv_phy_control);

			val & phy_status_mask, phy_status, display->power.chv_phy_control);

}



#undef BITS_SET