Commit 8040dc41 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'perf-tools-fixes-for-v7.0-1-2026-03-13' of... 

Merge tag 'perf-tools-fixes-for-v7.0-1-2026-03-13' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools

Pull perf tools fixes from Arnaldo Carvalho de Melo:

 - Fix stale build ID in module MMAP2 records in events synthesized for
   pre-existing processes

 - Fix rust cross compilation

 - hashmap__new() error pointer return handling fixes

 - Fix off-by-one bug in outside of functions check on the disasm code

 - Update header copies of kernel headers, including prctl.h, mount.h,
   fs.h, irq_vectors.h, perf_event.h, gfp_types.h, kvm.h, cpufeatures.h
   msr-index.h, also the syscall tables files that introduced the
   'rseq_slice_yield' syscall

 - Finish removal of ETM_OPT_* on the ARM coresight support, needed to
   sync the coresight-pmu.h header with the kernel sources

 - Make in-target rule robust against too long argument error

* tag 'perf-tools-fixes-for-v7.0-1-2026-03-13' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools: (22 commits)
  perf synthetic-events: Fix stale build ID in module MMAP2 records
  perf annotate loongarch: Fix off-by-one bug in outside check
  perf ftrace: Fix hashmap__new() error checking
  perf annotate: Fix hashmap__new() error checking
  perf cs-etm: Sync coresight-pmu.h header with the kernel sources
  perf cs-etm: Finish removal of ETM_OPT_*
  tools headers UAPI: Update tools' copy of linux/coresight-pmu.h
  tools headers: Update the syscall tables and unistd.h, to support the new 'rseq_slice_yield' syscall
  perf disasm: Fix off-by-one bug in outside check
  tools arch x86: Sync msr-index.h to pick MSR_{OMR_[0-3],CORE_PERF_GLOBAL_STATUS_SET}
  tools headers UAPI: Sync x86's asm/kvm.h with the kernel sources
  tools headers x86 cpufeatures: Sync with the kernel sources
  tools headers UAPI: Sync linux/kvm.h with the kernel sources
  tools headers: Update the linux/gfp_types.h copy with the kernel sources
  perf beauty: Update the linux/perf_event.h copy with the kernel sources
  perf beauty: Update the arch/x86/include/asm/irq_vectors.h copy with the kernel sources
  perf beauty: Sync UAPI linux/fs.h with kernel sources
  perf beauty: Sync linux/mount.h copy with the kernel sources
  tools build: Fix rust cross compilation
  perf build: Prevent "argument list too long" error
  ...
parents 8d996885 35b16a7a

tools/arch/x86/include/asm/amd/ibs.h

+1 −1
Original line number Diff line number Diff line
@@ -110,7 +110,7 @@ union ibs_op_data3 { 
		__u64	ld_op:1,			/* 0: load op */

			st_op:1,			/* 1: store op */

			dc_l1tlb_miss:1,		/* 2: data cache L1TLB miss */

			dc_l2tlb_miss:1,		/* 3: data cache L2TLB hit in 2M page */

			dc_l2tlb_miss:1,		/* 3: data cache L2TLB miss in 2M page */

			dc_l1tlb_hit_2m:1,		/* 4: data cache L1TLB hit in 2M page */

			dc_l1tlb_hit_1g:1,		/* 5: data cache L1TLB hit in 1G page */

			dc_l2tlb_hit_2m:1,		/* 6: data cache L2TLB hit in 2M page */

tools/arch/x86/include/asm/cpufeatures.h

+3 −1
Original line number Diff line number Diff line
@@ -84,7 +84,7 @@ 
#define X86_FEATURE_PEBS		( 3*32+12) /* "pebs" Precise-Event Based Sampling */

#define X86_FEATURE_BTS			( 3*32+13) /* "bts" Branch Trace Store */

#define X86_FEATURE_SYSCALL32		( 3*32+14) /* syscall in IA32 userspace */

#define X86_FEATURE_SYSENTER32		( 3*32+15) /* sysenter in IA32 userspace */

#define X86_FEATURE_SYSFAST32		( 3*32+15) /* sysenter/syscall in IA32 userspace */

#define X86_FEATURE_REP_GOOD		( 3*32+16) /* "rep_good" REP microcode works well */

#define X86_FEATURE_AMD_LBR_V2		( 3*32+17) /* "amd_lbr_v2" AMD Last Branch Record Extension Version 2 */

#define X86_FEATURE_CLEAR_CPU_BUF	( 3*32+18) /* Clear CPU buffers using VERW */
@@ -326,6 +326,7 @@ 
#define X86_FEATURE_AMX_FP16		(12*32+21) /* AMX fp16 Support */

#define X86_FEATURE_AVX_IFMA            (12*32+23) /* Support for VPMADD52[H,L]UQ */

#define X86_FEATURE_LAM			(12*32+26) /* "lam" Linear Address Masking */

#define X86_FEATURE_MOVRS		(12*32+31) /* MOVRS instructions */



/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */

#define X86_FEATURE_CLZERO		(13*32+ 0) /* "clzero" CLZERO instruction */
@@ -472,6 +473,7 @@ 
#define X86_FEATURE_GP_ON_USER_CPUID	(20*32+17) /* User CPUID faulting */



#define X86_FEATURE_PREFETCHI		(20*32+20) /* Prefetch Data/Instruction to Cache Level */

#define X86_FEATURE_ERAPS		(20*32+24) /* Enhanced Return Address Predictor Security */

#define X86_FEATURE_SBPB		(20*32+27) /* Selective Branch Prediction Barrier */

#define X86_FEATURE_IBPB_BRTYPE		(20*32+28) /* MSR_PRED_CMD[IBPB] flushes all branch type predictions */

#define X86_FEATURE_SRSO_NO		(20*32+29) /* CPU is not affected by SRSO */

tools/arch/x86/include/asm/msr-index.h

+6 −0
Original line number Diff line number Diff line
@@ -263,6 +263,11 @@ 
#define MSR_SNOOP_RSP_0			0x00001328

#define MSR_SNOOP_RSP_1			0x00001329



#define MSR_OMR_0			0x000003e0

#define MSR_OMR_1			0x000003e1

#define MSR_OMR_2			0x000003e2

#define MSR_OMR_3			0x000003e3



#define MSR_LBR_SELECT			0x000001c8

#define MSR_LBR_TOS			0x000001c9
@@ -1219,6 +1224,7 @@ 
#define MSR_CORE_PERF_GLOBAL_STATUS	0x0000038e

#define MSR_CORE_PERF_GLOBAL_CTRL	0x0000038f

#define MSR_CORE_PERF_GLOBAL_OVF_CTRL	0x00000390

#define MSR_CORE_PERF_GLOBAL_STATUS_SET	0x00000391



#define MSR_PERF_METRICS		0x00000329

tools/arch/x86/include/uapi/asm/kvm.h

+6 −2
Original line number Diff line number Diff line
@@ -503,6 +503,7 @@ struct kvm_sync_regs { 
#define KVM_X86_GRP_SEV			1

#  define KVM_X86_SEV_VMSA_FEATURES	0

#  define KVM_X86_SNP_POLICY_BITS	1

#  define KVM_X86_SEV_SNP_REQ_CERTS	2



struct kvm_vmx_nested_state_data {

	__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
@@ -743,6 +744,7 @@ enum sev_cmd_id { 
	KVM_SEV_SNP_LAUNCH_START = 100,

	KVM_SEV_SNP_LAUNCH_UPDATE,

	KVM_SEV_SNP_LAUNCH_FINISH,

	KVM_SEV_SNP_ENABLE_REQ_CERTS,



	KVM_SEV_NR_MAX,

};
@@ -914,8 +916,10 @@ struct kvm_sev_snp_launch_finish { 
	__u64 pad1[4];

};



#define KVM_X2APIC_API_USE_32BIT_IDS            (1ULL << 0)

#define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK  (1ULL << 1)

#define KVM_X2APIC_API_USE_32BIT_IDS			_BITULL(0)

#define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK		_BITULL(1)

#define KVM_X2APIC_ENABLE_SUPPRESS_EOI_BROADCAST	_BITULL(2)

#define KVM_X2APIC_DISABLE_SUPPRESS_EOI_BROADCAST	_BITULL(3)



struct kvm_hyperv_eventfd {

	__u32 conn_id;

tools/build/Build.include

+9 −0
Original line number Diff line number Diff line
@@ -98,6 +98,15 @@ c_flags_2 = $(filter-out $(CFLAGS_REMOVE_$(basetarget).o), $(c_flags_1)) 
c_flags   = $(filter-out $(CFLAGS_REMOVE_$(obj)), $(c_flags_2))

cxx_flags = -Wp,-MD,$(depfile) -Wp,-MT,$@ $(CXXFLAGS) -D"BUILD_STR(s)=\#s" $(CXXFLAGS_$(basetarget).o) $(CXXFLAGS_$(obj))



###

# Rust flags to be used on rule definition, includes:

# - global $(RUST_FLAGS)

# - per target Rust flags

# - per object Rust flags

rust_flags_1 = $(RUST_FLAGS) $(RUST_FLAGS_$(basetarget).o) $(RUST_FLAGS_$(obj))

rust_flags_2 = $(filter-out $(RUST_FLAGS_REMOVE_$(basetarget).o), $(rust_flags_1))

rust_flags   = $(filter-out $(RUST_FLAGS_REMOVE_$(obj)), $(rust_flags_2))



###

## HOSTCC C flags