Commit 8096df76 authored by Tao Zhou's avatar Tao Zhou Committed by Alex Deucher
Browse files

drm/amdgpu: add set/get mca debug mode operations 



Record the debug mode status in RAS.

Signed-off-by: default avatarTao Zhou <tao.zhou1@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 21226f02

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

+21 −0
Original line number Diff line number Diff line
@@ -3311,6 +3311,27 @@ int amdgpu_ras_reset_gpu(struct amdgpu_device *adev) 
	return 0;

}



void amdgpu_ras_set_mca_debug_mode(struct amdgpu_device *adev, bool enable)

{

	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);



	if (con)

		con->is_mca_debug_mode = enable;

}



bool amdgpu_ras_get_mca_debug_mode(struct amdgpu_device *adev)

{

	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);

	const struct amdgpu_mca_smu_funcs *mca_funcs = adev->mca.mca_funcs;



	if (!con)

		return false;



	if (mca_funcs && mca_funcs->mca_set_debug_mode)

		return con->is_mca_debug_mode;

	else

		return true;

}



/* Register each ip ras block into amdgpu ras */

int amdgpu_ras_register_ras_block(struct amdgpu_device *adev,

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h

+5 −0
Original line number Diff line number Diff line
@@ -434,6 +434,8 @@ struct amdgpu_ras { 


	/* Indicates smu whether need update bad channel info */

	bool update_channel_flag;

	/* Record status of smu mca debug mode */

	bool is_mca_debug_mode;



	/* Record special requirements of gpu reset caller */

	uint32_t  gpu_reset_flags;
@@ -768,6 +770,9 @@ struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev); 


int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras *ras_con);



void amdgpu_ras_set_mca_debug_mode(struct amdgpu_device *adev, bool enable);

bool amdgpu_ras_get_mca_debug_mode(struct amdgpu_device *adev);



int amdgpu_ras_register_ras_block(struct amdgpu_device *adev,

				struct amdgpu_ras_block_object *ras_block_obj);

void amdgpu_ras_interrupt_fatal_error_handler(struct amdgpu_device *adev);