Commit 80a0e828 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/discovery: optionally use fw based ip discovery 



On chips without native IP discovery support, use the fw binary
if available, otherwise we can continue without it.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarFlora Cui <flora.cui@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 25f602fb

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

+32 −8
Original line number Diff line number Diff line
@@ -2545,6 +2545,38 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
{

	int r;



	switch (adev->asic_type) {

	case CHIP_VEGA10:

	case CHIP_VEGA12:

	case CHIP_RAVEN:

	case CHIP_VEGA20:

	case CHIP_ARCTURUS:

	case CHIP_ALDEBARAN:

		/* this is not fatal.  We have a fallback below

		 * if the new firmwares are not present. some of

		 * this will be overridden below to keep things

		 * consistent with the current behavior.

		 */

		r = amdgpu_discovery_reg_base_init(adev);

		if (!r) {

			amdgpu_discovery_harvest_ip(adev);

			amdgpu_discovery_get_gfx_info(adev);

			amdgpu_discovery_get_mall_info(adev);

			amdgpu_discovery_get_vcn_info(adev);

		}

		break;

	default:

		r = amdgpu_discovery_reg_base_init(adev);

		if (r)

			return -EINVAL;



		amdgpu_discovery_harvest_ip(adev);

		amdgpu_discovery_get_gfx_info(adev);

		amdgpu_discovery_get_mall_info(adev);

		amdgpu_discovery_get_vcn_info(adev);

		break;

	}



	switch (adev->asic_type) {

	case CHIP_VEGA10:

		vega10_reg_base_init(adev);
@@ -2709,14 +2741,6 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
		adev->ip_versions[XGMI_HWIP][0] = IP_VERSION(6, 1, 0);

		break;

	default:

		r = amdgpu_discovery_reg_base_init(adev);

		if (r)

			return -EINVAL;



		amdgpu_discovery_harvest_ip(adev);

		amdgpu_discovery_get_gfx_info(adev);

		amdgpu_discovery_get_mall_info(adev);

		amdgpu_discovery_get_vcn_info(adev);

		break;

	}