Commit 80b3dc0a authored Oct 26, 2025 by Alexandre Courbot

gpu: nova-core: justify remaining uses of `as`



There are a few remaining cases where we *do* want to use `as`,
because we specifically want to strip the data that does not fit into
the destination type. Comment these uses to clear confusion about the
intent.

Acked-by: Danilo Krummrich <dakr@kernel.org>
[acourbot@nvidia.com: fix merge conflicts after rebase.]
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251029-nova-as-v3-6-6a30c7333ad9@nvidia.com>

parent 84e2b401

drivers/gpu/nova-core/falcon.rs

+4 −0

Original line number	Diff line number	Diff line
		@@ -490,9 +490,13 @@ fn dma_wr<F: FalconFirmware<Target = E>>(
		// Set up the base source DMA address.

		regs::NV_PFALCON_FALCON_DMATRFBASE::default()
		// CAST: `as u32` is used on purpose since we do want to strip the upper bits, which
		// will be written to `NV_PFALCON_FALCON_DMATRFBASE1`.
		.set_base((dma_start >> 8) as u32)
		.write(bar, &E::ID);
		regs::NV_PFALCON_FALCON_DMATRFBASE1::default()
		// CAST: `as u16` is used on purpose since the remaining bits are guaranteed to fit
		// within a `u16`.
		.set_base((dma_start >> 40) as u16)
		.write(bar, &E::ID);

drivers/gpu/nova-core/fb/hal/ga100.rs

+4 −0

Original line number	Diff line number	Diff line
		@@ -20,9 +20,13 @@ pub(super) fn read_sysmem_flush_page_ga100(bar: &Bar0) -> u64 {

		pub(super) fn write_sysmem_flush_page_ga100(bar: &Bar0, addr: u64) {
		regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI::default()
		// CAST: `as u32` is used on purpose since the remaining bits are guaranteed to fit within
		// a `u32`.
		.set_adr_63_40((addr >> FLUSH_SYSMEM_ADDR_SHIFT_HI) as u32)
		.write(bar);
		regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::default()
		// CAST: `as u32` is used on purpose since we want to strip the upper bits that have been
		// written to `NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI`.
		.set_adr_39_08((addr >> FLUSH_SYSMEM_ADDR_SHIFT) as u32)
		.write(bar);
		}