Commit 8101b276 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull pci fixes from Bjorn Helgaas:

 - Add Manivannan Sadhasivam as PCI native host bridge and endpoint
   driver reviewer (Manivannan Sadhasivam)

 - Disable MHI RAM data parity error interrupt for qcom SA8775P SoC to
   work around hardware erratum that causes a constant stream of
   interrupts (Manivannan Sadhasivam)

 - Don't try to fall back to qcom Operating Performance Points (OPP)
   support unless the platform actually supports OPP (Manivannan
   Sadhasivam)

 - Add imx@lists.linux.dev mailing list to MAINTAINERS for NXP
   layerscape and imx6 PCI controller drivers (Frank Li)

* tag 'pci-v6.11-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci:
  MAINTAINERS: PCI: Add NXP PCI controller mailing list imx@lists.linux.dev
  PCI: qcom: Use OPP only if the platform supports it
  PCI: qcom-ep: Disable MHI RAM data parity error interrupt for SA8775P SoC
  MAINTAINERS: Add Manivannan Sadhasivam as Reviewer for PCI native host bridge and endpoint drivers
parents 216d1631 150b572a
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+3 −0
Original line number Diff line number Diff line
@@ -17439,6 +17439,7 @@ M: Roy Zang <roy.zang@nxp.com>
L:	linuxppc-dev@lists.ozlabs.org
L:	linux-pci@vger.kernel.org
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L:	imx@lists.linux.dev
S:	Maintained
F:	drivers/pci/controller/dwc/*layerscape*
@@ -17465,6 +17466,7 @@ M: Richard Zhu <hongxing.zhu@nxp.com>
M:	Lucas Stach <l.stach@pengutronix.de>
L:	linux-pci@vger.kernel.org
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L:	imx@lists.linux.dev
S:	Maintained
F:	Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
F:	Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
@@ -17643,6 +17645,7 @@ F: drivers/pci/controller/pci-xgene-msi.c
PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS
M:	Lorenzo Pieralisi <lpieralisi@kernel.org>
M:	Krzysztof Wilczyński <kw@linux.com>
R:	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
R:	Rob Herring <robh@kernel.org>
L:	linux-pci@vger.kernel.org
S:	Supported
+13 −0
Original line number Diff line number Diff line
@@ -58,6 +58,7 @@
#define PARF_DEBUG_CNT_AUX_CLK_IN_L1SUB_L2	0xc88
#define PARF_DEVICE_TYPE			0x1000
#define PARF_BDF_TO_SID_CFG			0x2c00
#define PARF_INT_ALL_5_MASK			0x2dcc

/* PARF_INT_ALL_{STATUS/CLEAR/MASK} register fields */
#define PARF_INT_ALL_LINK_DOWN			BIT(1)
@@ -127,6 +128,9 @@
/* PARF_CFG_BITS register fields */
#define PARF_CFG_BITS_REQ_EXIT_L1SS_MSI_LTR_EN	BIT(1)

/* PARF_INT_ALL_5_MASK fields */
#define PARF_INT_ALL_5_MHI_RAM_DATA_PARITY_ERR	BIT(0)

/* ELBI registers */
#define ELBI_SYS_STTS				0x08
#define ELBI_CS2_ENABLE				0xa4
@@ -158,10 +162,12 @@ enum qcom_pcie_ep_link_status {
 * struct qcom_pcie_ep_cfg - Per SoC config struct
 * @hdma_support: HDMA support on this SoC
 * @override_no_snoop: Override NO_SNOOP attribute in TLP to enable cache snooping
 * @disable_mhi_ram_parity_check: Disable MHI RAM data parity error check
 */
struct qcom_pcie_ep_cfg {
	bool hdma_support;
	bool override_no_snoop;
	bool disable_mhi_ram_parity_check;
};

/**
@@ -480,6 +486,12 @@ static int qcom_pcie_perst_deassert(struct dw_pcie *pci)
	      PARF_INT_ALL_LINK_UP | PARF_INT_ALL_EDMA;
	writel_relaxed(val, pcie_ep->parf + PARF_INT_ALL_MASK);

	if (pcie_ep->cfg && pcie_ep->cfg->disable_mhi_ram_parity_check) {
		val = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_5_MASK);
		val &= ~PARF_INT_ALL_5_MHI_RAM_DATA_PARITY_ERR;
		writel_relaxed(val, pcie_ep->parf + PARF_INT_ALL_5_MASK);
	}

	ret = dw_pcie_ep_init_registers(&pcie_ep->pci.ep);
	if (ret) {
		dev_err(dev, "Failed to complete initialization: %d\n", ret);
@@ -901,6 +913,7 @@ static void qcom_pcie_ep_remove(struct platform_device *pdev)
static const struct qcom_pcie_ep_cfg cfg_1_34_0 = {
	.hdma_support = true,
	.override_no_snoop = true,
	.disable_mhi_ram_parity_check = true,
};

static const struct of_device_id qcom_pcie_ep_match[] = {
+5 −2
Original line number Diff line number Diff line
@@ -261,6 +261,7 @@ struct qcom_pcie {
	const struct qcom_pcie_cfg *cfg;
	struct dentry *debugfs;
	bool suspended;
	bool use_pm_opp;
};

#define to_qcom_pcie(x)		dev_get_drvdata((x)->dev)
@@ -1433,7 +1434,7 @@ static void qcom_pcie_icc_opp_update(struct qcom_pcie *pcie)
			dev_err(pci->dev, "Failed to set bandwidth for PCIe-MEM interconnect path: %d\n",
				ret);
		}
	} else {
	} else if (pcie->use_pm_opp) {
		freq_mbps = pcie_dev_speed_mbps(pcie_link_speed[speed]);
		if (freq_mbps < 0)
			return;
@@ -1592,6 +1593,8 @@ static int qcom_pcie_probe(struct platform_device *pdev)
				      max_freq);
			goto err_pm_runtime_put;
		}

		pcie->use_pm_opp = true;
	} else {
		/* Skip ICC init if OPP is supported as it is handled by OPP */
		ret = qcom_pcie_icc_init(pcie);
@@ -1683,7 +1686,7 @@ static int qcom_pcie_suspend_noirq(struct device *dev)
		if (ret)
			dev_err(dev, "Failed to disable CPU-PCIe interconnect path: %d\n", ret);

		if (!pcie->icc_mem)
		if (pcie->use_pm_opp)
			dev_pm_opp_set_opp(pcie->pci->dev, NULL);
	}
	return ret;