Commit 8130fa71 authored by Tim Harvey's avatar Tim Harvey Committed by Shawn Guo
Browse files

arm64: dts: imx8mm-venice-gw7903: add digital I/O ctl gpios 



The GW7903-C revision introduced two additional GPIO's for controlling
the digital I/O direction. Add them.

Signed-off-by: default avatarTim Harvey <tharvey@gateworks.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 37bbb8b2

arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts

+3 −1
Original line number Diff line number Diff line
@@ -250,7 +250,7 @@ &gpio1 { 
};



&gpio2 {

	gpio-line-names = "dig2_in", "dig2_out#", "", "", "", "", "", "",

	gpio-line-names = "dig2_in", "dig2_out#", "dig2_ctl", "", "", "", "dig1_ctl", "",

		"dig1_out#", "dig1_in", "", "", "", "", "", "",

		"", "", "", "", "", "", "", "",

		"", "", "", "", "", "", "", "";
@@ -630,6 +630,8 @@ MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x40000041 /* RS485# */ 
			MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12	0x40000041 /* RS232# */

			MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9	0x40000041 /* DIG1_IN */

			MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8	0x40000041 /* DIG1_OUT */

			MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6	0x40000041 /* DIG1_CTL */

			MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2	0x40000041 /* DIG2_CTL */

			MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0		0x40000041 /* DIG2_IN */

			MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1		0x40000041 /* DIG2_OUT */

			MX8MM_IOMUXC_ECSPI1_MOSI_GPIO5_IO7	0x40000041 /* SIM1DET# */