Commit 8144d17a authored by Jessica Zhang's avatar Jessica Zhang Committed by Dmitry Baryshkov
Browse files

drm/msm/dpu: Skip trigger flush and start for CWB 



For concurrent writeback, the real time encoder is responsible for
trigger flush and trigger start. Return early for trigger start and
trigger flush for the concurrent writeback encoders.

Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: default avatarJessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/637505/
Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-12-a44c293cf422@quicinc.com


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 95bbde1d

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

+18 −0
Original line number Diff line number Diff line
@@ -1618,6 +1618,7 @@ static void dpu_encoder_off_work(struct work_struct *work) 
static void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc,

		struct dpu_encoder_phys *phys, uint32_t extra_flush_bits)

{

	struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);

	struct dpu_hw_ctl *ctl;

	int pending_kickoff_cnt;

	u32 ret = UINT_MAX;
@@ -1635,6 +1636,15 @@ static void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc, 


	pending_kickoff_cnt = dpu_encoder_phys_inc_pending(phys);



	/* Return early if encoder is writeback and in clone mode */

	if (drm_enc->encoder_type == DRM_MODE_ENCODER_VIRTUAL &&

	    dpu_enc->cwb_mask) {

		DPU_DEBUG("encoder %d skip flush for concurrent writeback encoder\n",

				DRMID(drm_enc));

		return;

	}





	if (extra_flush_bits && ctl->ops.update_pending_flush)

		ctl->ops.update_pending_flush(ctl, extra_flush_bits);
@@ -1657,6 +1667,8 @@ static void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc, 
 */

static void _dpu_encoder_trigger_start(struct dpu_encoder_phys *phys)

{

	struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(phys->parent);



	if (!phys) {

		DPU_ERROR("invalid argument(s)\n");

		return;
@@ -1667,6 +1679,12 @@ static void _dpu_encoder_trigger_start(struct dpu_encoder_phys *phys) 
		return;

	}



	if (phys->parent->encoder_type == DRM_MODE_ENCODER_VIRTUAL &&

	    dpu_enc->cwb_mask) {

		DPU_DEBUG("encoder %d CWB enabled, skipping\n", DRMID(phys->parent));

		return;

	}



	if (phys->ops.trigger_start && phys->enable_state != DPU_ENC_DISABLED)

		phys->ops.trigger_start(phys);

}