Commit 822b13d1 authored by Lijo Lazar's avatar Lijo Lazar Committed by Alex Deucher
Browse files

drm/amdgpu: Add VCN v4.0.3 RRMT register offset 



Add RRMT control register offset for VCN v4.0.3

Signed-off-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Reviewed-by: default avatarSathishkumar S <sathishkumar.sundararaju@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e55565f8

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_offset.h

+2 −1
Original line number Diff line number Diff line
@@ -779,7 +779,8 @@ 
#define regUVD_LMI_MIF_REF_LUMA_64BIT_BAR_HIGH_BASE_IDX                                                 1

#define regVCN_RAS_CNTL                                                                                 0x02df

#define regVCN_RAS_CNTL_BASE_IDX                                                                        1



#define regVCN_RRMT_CNTL                                                                                0x0940

#define regVCN_RRMT_CNTL_BASE_IDX                                                                       1



// addressBlock: aid_uvd0_uvd_jpeg0_jpegnpdec

// base address: 0x20f00