Commit 82a4be88 authored by Ashutosh Dixit's avatar Ashutosh Dixit
Browse files

drm/xe/oa: Enable OAM latency measurement 



Enable OAM latency measurement for Xe3+ platforms.

Bspec: 58840

v2: Introduce DRM_XE_OA_UNIT_TYPE_OAM_SAG
v3: Also add LNCF_MISC_CONFIG_REGISTER0 needed by MDAPI

Signed-off-by: default avatarAshutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: default avatarUmesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://lore.kernel.org/r/20250606192618.4133817-6-ashutosh.dixit@intel.com
parent 10d42ef3

drivers/gpu/drm/xe/regs/xe_oa_regs.h

+3 −0
Original line number Diff line number Diff line
@@ -97,4 +97,7 @@ 
#define OAM_STATUS(base)			XE_REG((base) + OAM_STATUS_OFFSET)

#define OAM_MMIO_TRG(base)			XE_REG((base) + OAM_MMIO_TRG_OFFSET)



#define OAM_COMPRESSION_T3_CONTROL		XE_REG(0x1c2e00)

#define  OAM_LAT_MEASURE_ENABLE			REG_BIT(4)



#endif

drivers/gpu/drm/xe/xe_oa.c

+11 −1
Original line number Diff line number Diff line
@@ -844,6 +844,11 @@ static void xe_oa_disable_metric_set(struct xe_oa_stream *stream) 


	/* Reset PMON Enable to save power. */

	xe_mmio_rmw32(mmio, XELPMP_SQCNT1, sqcnt1, 0);



	if ((stream->oa_unit->type == DRM_XE_OA_UNIT_TYPE_OAM ||

	     stream->oa_unit->type == DRM_XE_OA_UNIT_TYPE_OAM_SAG) &&

	    GRAPHICS_VER(stream->oa->xe) >= 30)

		xe_mmio_rmw32(mmio, OAM_COMPRESSION_T3_CONTROL, OAM_LAT_MEASURE_ENABLE, 0);

}



static void xe_oa_stream_destroy(struct xe_oa_stream *stream)
@@ -1111,9 +1116,13 @@ static int xe_oa_enable_metric_set(struct xe_oa_stream *stream) 
	 */

	sqcnt1 = SQCNT1_PMON_ENABLE |

		 (HAS_OA_BPC_REPORTING(stream->oa->xe) ? SQCNT1_OABPC : 0);



	xe_mmio_rmw32(mmio, XELPMP_SQCNT1, 0, sqcnt1);



	if ((stream->oa_unit->type == DRM_XE_OA_UNIT_TYPE_OAM ||

	     stream->oa_unit->type == DRM_XE_OA_UNIT_TYPE_OAM_SAG) &&

	    GRAPHICS_VER(stream->oa->xe) >= 30)

		xe_mmio_rmw32(mmio, OAM_COMPRESSION_T3_CONTROL, 0, OAM_LAT_MEASURE_ENABLE);



	/* Configure OAR/OAC */

	if (stream->exec_q) {

		ret = xe_oa_configure_oa_context(stream, true);
@@ -2190,6 +2199,7 @@ static const struct xe_mmio_range gen12_oa_mux_regs[] = { 
static const struct xe_mmio_range xe2_oa_mux_regs[] = {

	{ .start = 0x5194, .end = 0x5194 },	/* SYS_MEM_LAT_MEASURE_MERTF_GRP_3D */

	{ .start = 0x8704, .end = 0x8704 },	/* LMEM_LAT_MEASURE_MCFG_GRP */

	{ .start = 0xB01C, .end = 0xB01C },	/* LNCF_MISC_CONFIG_REGISTER0 */

	{ .start = 0xB1BC, .end = 0xB1BC },	/* L3_BANK_LAT_MEASURE_LBCF_GFX */

	{ .start = 0xD0E0, .end = 0xD0F4 },	/* VISACTL */

	{ .start = 0xE18C, .end = 0xE18C },	/* SAMPLER_MODE */