Commit 82a562ab authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
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drm/amd/display: disable timing sync b/w odm halves



Fix for a bug where we would try to timing sync 2 odm halves.

Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 97ca3089
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+3 −1
Original line number Diff line number Diff line
@@ -1333,7 +1333,9 @@ static void program_timing_sync(
	struct pipe_ctx *unsynced_pipes[MAX_PIPES] = { NULL };

	for (i = 0; i < pipe_count; i++) {
		if (!ctx->res_ctx.pipe_ctx[i].stream || ctx->res_ctx.pipe_ctx[i].top_pipe)
		if (!ctx->res_ctx.pipe_ctx[i].stream
				|| ctx->res_ctx.pipe_ctx[i].top_pipe
				|| ctx->res_ctx.pipe_ctx[i].prev_odm_pipe)
			continue;

		unsynced_pipes[i] = &ctx->res_ctx.pipe_ctx[i];