Commit 82b6661c authored by Yi Liu's avatar Yi Liu Committed by Jason Gunthorpe
Browse files

iommufd: Add data structure for Intel VT-d stage-1 domain allocation 

This adds IOMMU_HWPT_DATA_VTD_S1 for stage-1 hw_pagetable of Intel
VT-d and the corressponding data structure for userspace specified parameter
for the domain allocation.

Link: https://lore.kernel.org/r/20231026044216.64964-2-yi.l.liu@intel.com


Reviewed-by: default avatarKevin Tian <kevin.tian@intel.com>
Signed-off-by: default avatarYi Liu <yi.l.liu@intel.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
parent a2cdecdf

include/uapi/linux/iommufd.h

+30 −0
Original line number Diff line number Diff line
@@ -361,12 +361,42 @@ enum iommufd_hwpt_alloc_flags { 
	IOMMU_HWPT_ALLOC_DIRTY_TRACKING = 1 << 1,

};



/**

 * enum iommu_hwpt_vtd_s1_flags - Intel VT-d stage-1 page table

 *                                entry attributes

 * @IOMMU_VTD_S1_SRE: Supervisor request

 * @IOMMU_VTD_S1_EAFE: Extended access enable

 * @IOMMU_VTD_S1_WPE: Write protect enable

 */

enum iommu_hwpt_vtd_s1_flags {

	IOMMU_VTD_S1_SRE = 1 << 0,

	IOMMU_VTD_S1_EAFE = 1 << 1,

	IOMMU_VTD_S1_WPE = 1 << 2,

};



/**

 * struct iommu_hwpt_vtd_s1 - Intel VT-d stage-1 page table

 *                            info (IOMMU_HWPT_DATA_VTD_S1)

 * @flags: Combination of enum iommu_hwpt_vtd_s1_flags

 * @pgtbl_addr: The base address of the stage-1 page table.

 * @addr_width: The address width of the stage-1 page table

 * @__reserved: Must be 0

 */

struct iommu_hwpt_vtd_s1 {

	__aligned_u64 flags;

	__aligned_u64 pgtbl_addr;

	__u32 addr_width;

	__u32 __reserved;

};



/**

 * enum iommu_hwpt_data_type - IOMMU HWPT Data Type

 * @IOMMU_HWPT_DATA_NONE: no data

 * @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table

 */

enum iommu_hwpt_data_type {

	IOMMU_HWPT_DATA_NONE,

	IOMMU_HWPT_DATA_VTD_S1,

};



/**