Commit 835fe229 authored by Richard Zhu's avatar Richard Zhu Committed by Bjorn Helgaas
Browse files

PCI: imx6: Collect clock enables in imx6_pcie_clk_enable() 

Encapsulate the i.MX PCIe clock enable operations into one standalone
function, imx6_pcie_clk_enable().  No functional change intended.

[bhelgaas: split pure code moves into separate patches]
Link: https://lore.kernel.org/r/1657783869-19194-7-git-send-email-hongxing.zhu@nxp.com


Signed-off-by: default avatarRichard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarLucas Stach <l.stach@pengutronix.de>
parent d0a75c79

drivers/pci/controller/dwc/pci-imx6.c

+56 −39
Original line number Diff line number Diff line
@@ -600,6 +600,58 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie) 
	}

}



static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie)

{

	struct dw_pcie *pci = imx6_pcie->pci;

	struct device *dev = pci->dev;

	int ret;



	ret = clk_prepare_enable(imx6_pcie->pcie_phy);

	if (ret) {

		dev_err(dev, "unable to enable pcie_phy clock\n");

		return ret;

	}



	ret = clk_prepare_enable(imx6_pcie->pcie_bus);

	if (ret) {

		dev_err(dev, "unable to enable pcie_bus clock\n");

		goto err_pcie_bus;

	}



	ret = clk_prepare_enable(imx6_pcie->pcie);

	if (ret) {

		dev_err(dev, "unable to enable pcie clock\n");

		goto err_pcie;

	}



	ret = imx6_pcie_enable_ref_clk(imx6_pcie);

	if (ret) {

		dev_err(dev, "unable to enable pcie ref clock\n");

		goto err_ref_clk;

	}



	switch (imx6_pcie->drvdata->variant) {

	case IMX8MM:

		if (phy_power_on(imx6_pcie->phy))

			dev_err(dev, "unable to power on PHY\n");

		break;

	default:

		break;

	}

	/* allow the clocks to stabilize */

	usleep_range(200, 500);

	return 0;



err_ref_clk:

	clk_disable_unprepare(imx6_pcie->pcie);

err_pcie:

	clk_disable_unprepare(imx6_pcie->pcie_bus);

err_pcie_bus:

	clk_disable_unprepare(imx6_pcie->pcie_phy);



	return ret;

}



static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)

{

	clk_disable_unprepare(imx6_pcie->pcie);
@@ -671,40 +723,11 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) 
		}

	}



	ret = clk_prepare_enable(imx6_pcie->pcie_phy);

	if (ret) {

		dev_err(dev, "unable to enable pcie_phy clock\n");

		goto err_pcie_phy;

	}



	ret = clk_prepare_enable(imx6_pcie->pcie_bus);

	if (ret) {

		dev_err(dev, "unable to enable pcie_bus clock\n");

		goto err_pcie_bus;

	}



	ret = clk_prepare_enable(imx6_pcie->pcie);

	if (ret) {

		dev_err(dev, "unable to enable pcie clock\n");

		goto err_pcie;

	}



	ret = imx6_pcie_enable_ref_clk(imx6_pcie);

	ret = imx6_pcie_clk_enable(imx6_pcie);

	if (ret) {

		dev_err(dev, "unable to enable pcie ref clock\n");

		goto err_ref_clk;

	}



	switch (imx6_pcie->drvdata->variant) {

	case IMX8MM:

		if (phy_power_on(imx6_pcie->phy))

			dev_err(dev, "unable to power on PHY\n");

		break;

	default:

		break;

		dev_err(dev, "unable to enable pcie clocks: %d\n", ret);

		goto err_clks;

	}

	/* allow the clocks to stabilize */

	usleep_range(200, 500);



	switch (imx6_pcie->drvdata->variant) {

	case IMX8MQ:
@@ -763,13 +786,7 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) 


	return;



err_ref_clk:

	clk_disable_unprepare(imx6_pcie->pcie);

err_pcie:

	clk_disable_unprepare(imx6_pcie->pcie_bus);

err_pcie_bus:

	clk_disable_unprepare(imx6_pcie->pcie_phy);

err_pcie_phy:

err_clks:

	if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) {

		ret = regulator_disable(imx6_pcie->vpcie);

		if (ret)