Commit 8374c2cb authored by Maciej W. Rozycki's avatar Maciej W. Rozycki Committed by Thomas Bogendoerfer
Browse files

MIPS: Always record SEGBITS in cpu_data.vmbits 



With a 32-bit kernel running on 64-bit MIPS hardware the hardcoded value
of `cpu_vmbits' only records the size of compatibility useg and does not
reflect the size of native xuseg or the complete range of values allowed
in the VPN2 field of TLB entries.

An upcoming change will need the actual VPN2 value range permitted even
in 32-bit kernel configurations, so always include the `vmbits' member
in `struct cpuinfo_mips' and probe for SEGBITS when running on 64-bit
hardware and resorting to the currently hardcoded value of 31 on 32-bit
processors.  No functional change for users of `cpu_vmbits'.

Signed-off-by: default avatarMaciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent ec8bf188

arch/mips/include/asm/cpu-features.h

+0 −1
Original line number Diff line number Diff line
@@ -484,7 +484,6 @@ 
# endif

# ifndef cpu_vmbits

# define cpu_vmbits cpu_data[0].vmbits

# define __NEED_VMBITS_PROBE

# endif

#endif

arch/mips/include/asm/cpu-info.h

+0 −2
Original line number Diff line number Diff line
@@ -80,9 +80,7 @@ struct cpuinfo_mips { 
	int			srsets; /* Shadow register sets */

	int			package;/* physical package number */

	unsigned int		globalnumber;

#ifdef CONFIG_64BIT

	int			vmbits; /* Virtual memory size in bits */

#endif

	void			*data;	/* Additional data */

	unsigned int		watch_reg_count;   /* Number that exist */

	unsigned int		watch_reg_use_cnt; /* Usable by ptrace */

arch/mips/include/asm/mipsregs.h

+2 −0
Original line number Diff line number Diff line
@@ -1871,6 +1871,8 @@ do { \ 


#define read_c0_entryhi()	__read_ulong_c0_register($10, 0)

#define write_c0_entryhi(val)	__write_ulong_c0_register($10, 0, val)

#define read_c0_entryhi_64()	__read_64bit_c0_register($10, 0)

#define write_c0_entryhi_64(val) __write_64bit_c0_register($10, 0, val)



#define read_c0_guestctl1()	__read_32bit_c0_register($10, 4)

#define write_c0_guestctl1(val)	__write_32bit_c0_register($10, 4, val)

arch/mips/kernel/cpu-probe.c

+8 −5
Original line number Diff line number Diff line
@@ -210,11 +210,14 @@ static inline void set_elf_base_platform(const char *plat) 


static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)

{

#ifdef __NEED_VMBITS_PROBE

	write_c0_entryhi(0x3fffffffffffe000ULL);

	int vmbits = 31;



	if (cpu_has_64bits) {

		write_c0_entryhi_64(0x3fffffffffffe000ULL);

		back_to_back_c0_hazard();

	c->vmbits = fls64(read_c0_entryhi() & 0x3fffffffffffe000ULL);

#endif

		vmbits = fls64(read_c0_entryhi_64() & 0x3fffffffffffe000ULL);

	}

	c->vmbits = vmbits;

}



static void set_isa(struct cpuinfo_mips *c, unsigned int isa)

arch/mips/kernel/cpu-r3k-probe.c

+2 −0
Original line number Diff line number Diff line
@@ -137,6 +137,8 @@ void cpu_probe(void) 
	else

		cpu_set_nofpu_opts(c);



	c->vmbits = 31;



	reserve_exception_space(0, 0x400);

}