Commit 83d4e044 authored by Martin Botka's avatar Martin Botka Committed by Viresh Kumar
Browse files

dt-bindings: opp: Describe H616 OPPs and opp-supported-hw 



Compared to the existing Allwinner H6 OPP scheme, the H616 uses a
similar NVMEM based mechanism to determine the silicon revision, which
is required to select the right frequency / voltage pair for the OPPs.
However it limits the maximum frequency for some speed bins, also seems
to not support all frequencies in all speed bins, which requires us to
introduce the opp-supported-hw property.

Add this property to the list of allowed properties, also drop the
requirement for the revision specific opp-microvolt properties, since
they might not be needed if using opp-supported-hw.

Also use to opportunity to adjust some wording, and drop a sentence
referring to the Linux driver and the OPP subsystem.

Shorten the existing example and add another example, showcasing the
opp-supported-hw property.

Signed-off-by: default avatarMartin Botka <martin.botka@somainline.org>
Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
parent 6ae07744

Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml

+43 −44
Original line number Diff line number Diff line
@@ -13,25 +13,25 @@ maintainers: 
description: |

  For some SoCs, the CPU frequency subset and voltage value of each

  OPP varies based on the silicon variant in use. Allwinner Process

  Voltage Scaling Tables defines the voltage and frequency value based

  on the speedbin blown in the efuse combination. The

  sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to

  provide the OPP framework with required information.

  Voltage Scaling Tables define the voltage and frequency values based

  on the speedbin blown in the efuse combination.



allOf:

  - $ref: opp-v2-base.yaml#



properties:

  compatible:

    const: allwinner,sun50i-h6-operating-points

    enum:

      - allwinner,sun50i-h6-operating-points

      - allwinner,sun50i-h616-operating-points



  nvmem-cells:

    description: |

      A phandle pointing to a nvmem-cells node representing the efuse

      registers that has information about the speedbin that is used

      register that has information about the speedbin that is used

      to select the right frequency/voltage value pair. Please refer

      the for nvmem-cells bindings

      Documentation/devicetree/bindings/nvmem/nvmem.txt and also

      to the nvmem-cells bindings in

      Documentation/devicetree/bindings/nvmem/nvmem.yaml and also the

      examples below.



  opp-shared: true
@@ -47,15 +47,18 @@ patternProperties: 
    properties:

      opp-hz: true

      clock-latency-ns: true

      opp-microvolt: true

      opp-supported-hw:

        maxItems: 1

        description:

          A single 32 bit bitmap value, representing compatible HW, one

          bit per speed bin index.



    patternProperties:

      "^opp-microvolt-speed[0-9]$": true



    required:

      - opp-hz

      - opp-microvolt-speed0

      - opp-microvolt-speed1

      - opp-microvolt-speed2



    unevaluatedProperties: false
@@ -77,58 +80,54 @@ examples: 
            opp-microvolt-speed2 = <800000>;

        };



        opp-720000000 {

        opp-1080000000 {

            clock-latency-ns = <244144>; /* 8 32k periods */

            opp-hz = /bits/ 64 <720000000>;

            opp-hz = /bits/ 64 <1080000000>;



            opp-microvolt-speed0 = <880000>;

            opp-microvolt-speed1 = <820000>;

            opp-microvolt-speed2 = <800000>;

            opp-microvolt-speed0 = <1060000>;

            opp-microvolt-speed1 = <880000>;

            opp-microvolt-speed2 = <840000>;

        };



        opp-816000000 {

        opp-1488000000 {

            clock-latency-ns = <244144>; /* 8 32k periods */

            opp-hz = /bits/ 64 <816000000>;

            opp-hz = /bits/ 64 <1488000000>;



            opp-microvolt-speed0 = <880000>;

            opp-microvolt-speed1 = <820000>;

            opp-microvolt-speed2 = <800000>;

            opp-microvolt-speed0 = <1160000>;

            opp-microvolt-speed1 = <1000000>;

            opp-microvolt-speed2 = <960000>;

        };



        opp-888000000 {

            clock-latency-ns = <244144>; /* 8 32k periods */

            opp-hz = /bits/ 64 <888000000>;



            opp-microvolt-speed0 = <940000>;

            opp-microvolt-speed1 = <820000>;

            opp-microvolt-speed2 = <800000>;

    };



        opp-1080000000 {

  - |

    opp-table {

        compatible = "allwinner,sun50i-h616-operating-points";

        nvmem-cells = <&speedbin_efuse>;

        opp-shared;



        opp-480000000 {

            clock-latency-ns = <244144>; /* 8 32k periods */

            opp-hz = /bits/ 64 <1080000000>;

            opp-hz = /bits/ 64 <480000000>;



            opp-microvolt-speed0 = <1060000>;

            opp-microvolt-speed1 = <880000>;

            opp-microvolt-speed2 = <840000>;

            opp-microvolt = <900000>;

            opp-supported-hw = <0x1f>;

        };



        opp-1320000000 {

        opp-792000000 {

            clock-latency-ns = <244144>; /* 8 32k periods */

            opp-hz = /bits/ 64 <1320000000>;

            opp-hz = /bits/ 64 <792000000>;



            opp-microvolt-speed0 = <1160000>;

            opp-microvolt-speed1 = <940000>;

            opp-microvolt-speed2 = <900000>;

            opp-microvolt-speed1 = <900000>;

            opp-microvolt-speed4 = <940000>;

            opp-supported-hw = <0x12>;

        };



        opp-1488000000 {

        opp-1512000000 {

            clock-latency-ns = <244144>; /* 8 32k periods */

            opp-hz = /bits/ 64 <1488000000>;

            opp-hz = /bits/ 64 <1512000000>;



            opp-microvolt-speed0 = <1160000>;

            opp-microvolt-speed1 = <1000000>;

            opp-microvolt-speed2 = <960000>;

            opp-microvolt = <1100000>;

            opp-supported-hw = <0x0a>;

        };

    };