Commit 841dd5b1 authored by Josua Mayer's avatar Josua Mayer Committed by Gregory CLEMENT
Browse files

arm64: dts: marvell: cn9130-sr-som: fix cp0 mdio pin numbers 



SolidRun CN9130 SoM actually uses CP_MPP[0:1] for mdio. CP_MPP[40]
provides reference clock for dsa switch and ethernet phy on Clearfog
Pro, wheras MPP[41] controls efuse programming voltage "VHV".

Update the cp0 mdio pinctrl node to specify mpp0, mpp1.

Fixes: 1c510c7d ("arm64: dts: add description for solidrun cn9130 som and clearfog boards")
Cc: stable@vger.kernel.org # 6.11.x
Signed-off-by: default avatarJosua Mayer <josua@solid-run.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/stable/20241002-cn9130-som-mdio-v1-1-0942be4dc550%40solid-run.com


Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent 9852d85e

arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -136,7 +136,7 @@ cp0_i2c0_pins: cp0-i2c0-pins { 
		};



		cp0_mdio_pins: cp0-mdio-pins {

			marvell,pins = "mpp40", "mpp41";

			marvell,pins = "mpp0", "mpp1";

			marvell,function = "ge";

		};