Commit 84448fa6 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'sunxi-clk-for-6.9-1' of...

Merge tag 'sunxi-clk-for-6.9-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner

Pull Allwinner clk driver updates from Jernej Skrabec:

 - fix kerneldoc warnings

* tag 'sunxi-clk-for-6.9-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi: usb: fix kernel-doc warnings
  clk: sunxi: sun9i-cpus: fix kernel-doc warnings
  clk: sunxi: a20-gmac: fix kernel-doc warnings
parents 6613476e aed6d713
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+11 −10
Original line number Diff line number Diff line
@@ -15,8 +15,19 @@

static DEFINE_SPINLOCK(gmac_lock);


#define SUN7I_A20_GMAC_GPIT	2
#define SUN7I_A20_GMAC_MASK	0x3
#define SUN7I_A20_GMAC_PARENTS	2

static u32 sun7i_a20_gmac_mux_table[SUN7I_A20_GMAC_PARENTS] = {
	0x00, /* Select mii_phy_tx_clk */
	0x02, /* Select gmac_int_tx_clk */
};

/**
 * sun7i_a20_gmac_clk_setup - Setup function for A20/A31 GMAC clock module
 * @node: &struct device_node for the clock
 *
 * This clock looks something like this
 *                               ________________________
@@ -39,16 +50,6 @@ static DEFINE_SPINLOCK(gmac_lock);
 * enable/disable this clock to configure the required state. The clock
 * driver then responds by auto-reparenting the clock.
 */

#define SUN7I_A20_GMAC_GPIT	2
#define SUN7I_A20_GMAC_MASK	0x3
#define SUN7I_A20_GMAC_PARENTS	2

static u32 sun7i_a20_gmac_mux_table[SUN7I_A20_GMAC_PARENTS] = {
	0x00, /* Select mii_phy_tx_clk */
	0x02, /* Select gmac_int_tx_clk */
};

static void __init sun7i_a20_gmac_clk_setup(struct device_node *node)
{
	struct clk *clk;
+4 −3
Original line number Diff line number Diff line
@@ -18,9 +18,6 @@

static DEFINE_SPINLOCK(sun9i_a80_cpus_lock);

/**
 * sun9i_a80_cpus_clk_setup() - Setup function for a80 cpus composite clk
 */

#define SUN9I_CPUS_MAX_PARENTS		4
#define SUN9I_CPUS_MUX_PARENT_PLL4	3
@@ -180,6 +177,10 @@ static const struct clk_ops sun9i_a80_cpus_clk_ops = {
	.set_rate	= sun9i_a80_cpus_clk_set_rate,
};

/**
 * sun9i_a80_cpus_setup() - Setup function for a80 cpus composite clk
 * @node: &struct device_node for the clock
 */
static void sun9i_a80_cpus_setup(struct device_node *node)
{
	const char *clk_name = node->name;
+6 −3
Original line number Diff line number Diff line
@@ -73,9 +73,6 @@ static const struct reset_control_ops sunxi_usb_reset_ops = {
	.deassert	= sunxi_usb_reset_deassert,
};

/**
 * sunxi_usb_clk_setup() - Setup function for usb gate clocks
 */

#define SUNXI_USB_MAX_SIZE 32

@@ -85,6 +82,12 @@ struct usb_clk_data {
	bool reset_needs_clk;
};

/**
 * sunxi_usb_clk_setup() - Setup function for usb gate clocks
 * @node: &struct device_node for the clock
 * @data: &struct usb_clk_data for the clock
 * @lock: spinlock for the clock
 */
static void __init sunxi_usb_clk_setup(struct device_node *node,
				       const struct usb_clk_data *data,
				       spinlock_t *lock)