Commit 84c7d76b authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull crypto updates from Herbert Xu:
 "API:
   - Remove crypto stats interface

  Algorithms:
   - Add faster AES-XTS on modern x86_64 CPUs
   - Forbid curves with order less than 224 bits in ecc (FIPS 186-5)
   - Add ECDSA NIST P521

  Drivers:
   - Expose otp zone in atmel
   - Add dh fallback for primes > 4K in qat
   - Add interface for live migration in qat
   - Use dma for aes requests in starfive
   - Add full DMA support for stm32mpx in stm32
   - Add Tegra Security Engine driver

  Others:
   - Introduce scope-based x509_certificate allocation"

* tag 'v6.10-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (123 commits)
  crypto: atmel-sha204a - provide the otp content
  crypto: atmel-sha204a - add reading from otp zone
  crypto: atmel-i2c - rename read function
  crypto: atmel-i2c - add missing arg description
  crypto: iaa - Use kmemdup() instead of kzalloc() and memcpy()
  crypto: sahara - use 'time_left' variable with wait_for_completion_timeout()
  crypto: api - use 'time_left' variable with wait_for_completion_killable_timeout()
  crypto: caam - i.MX8ULP donot have CAAM page0 access
  crypto: caam - init-clk based on caam-page0-access
  crypto: starfive - Use fallback for unaligned dma access
  crypto: starfive - Do not free stack buffer
  crypto: starfive - Skip unneeded fallback allocation
  crypto: starfive - Skip dma setup for zeroed message
  crypto: hisilicon/sec2 - fix for register offset
  crypto: hisilicon/debugfs - mask the unnecessary info from the dump
  crypto: qat - specify firmware files for 402xx
  crypto: x86/aes-gcm - simplify GCM hash subkey derivation
  crypto: x86/aes-gcm - delete unused GCM assembly code
  crypto: x86/aes-xts - simplify loop in xts_crypt_slowpath()
  hwrng: stm32 - repair clock handling
  ...
parents 87caef42 13909a0c
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+52 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/crypto/nvidia,tegra234-se-aes.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NVIDIA Tegra Security Engine for AES algorithms

description:
  The Tegra Security Engine accelerates the following AES encryption/decryption
  algorithms - AES-ECB, AES-CBC, AES-OFB, AES-XTS, AES-CTR, AES-GCM, AES-CCM,
  AES-CMAC

maintainers:
  - Akhil R <akhilrajeev@nvidia.com>

properties:
  compatible:
    const: nvidia,tegra234-se-aes

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  iommus:
    maxItems: 1

  dma-coherent: true

required:
  - compatible
  - reg
  - clocks
  - iommus

additionalProperties: false

examples:
  - |
    #include <dt-bindings/memory/tegra234-mc.h>
    #include <dt-bindings/clock/tegra234-clock.h>

    crypto@15820000 {
        compatible = "nvidia,tegra234-se-aes";
        reg = <0x15820000 0x10000>;
        clocks = <&bpmp TEGRA234_CLK_SE>;
        iommus = <&smmu TEGRA234_SID_SES_SE1>;
        dma-coherent;
    };
...
+52 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/crypto/nvidia,tegra234-se-hash.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NVIDIA Tegra Security Engine for HASH algorithms

description:
  The Tegra Security HASH Engine accelerates the following HASH functions -
  SHA1, SHA224, SHA256, SHA384, SHA512, SHA3-224, SHA3-256, SHA3-384, SHA3-512
  HMAC(SHA224), HMAC(SHA256), HMAC(SHA384), HMAC(SHA512)

maintainers:
  - Akhil R <akhilrajeev@nvidia.com>

properties:
  compatible:
    const: nvidia,tegra234-se-hash

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  iommus:
    maxItems: 1

  dma-coherent: true

required:
  - compatible
  - reg
  - clocks
  - iommus

additionalProperties: false

examples:
  - |
    #include <dt-bindings/memory/tegra234-mc.h>
    #include <dt-bindings/clock/tegra234-clock.h>

    crypto@15840000 {
        compatible = "nvidia,tegra234-se-hash";
        reg = <0x15840000 0x10000>;
        clocks = <&bpmp TEGRA234_CLK_SE>;
        iommus = <&smmu TEGRA234_SID_SES_SE2>;
        dma-coherent;
    };
...
+0 −28
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OMAP SoC SHA crypto Module

Required properties:

- compatible : Should contain entries for this and backward compatible
  SHAM versions:
  - "ti,omap2-sham" for OMAP2 & OMAP3.
  - "ti,omap4-sham" for OMAP4 and AM33XX.
  - "ti,omap5-sham" for OMAP5, DRA7 and AM43XX.
- ti,hwmods: Name of the hwmod associated with the SHAM module
- reg : Offset and length of the register set for the module
- interrupts : the interrupt-specifier for the SHAM module.

Optional properties:
- dmas: DMA specifiers for the rx dma. See the DMA client binding,
	Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request name. Should be "rx" if a dma is present.

Example:
	/* AM335x */
	sham: sham@53100000 {
		compatible = "ti,omap4-sham";
		ti,hwmods = "sham";
		reg = <0x53100000 0x200>;
		interrupts = <109>;
		dmas = <&edma 36>;
		dma-names = "rx";
	};
+1 −0
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@@ -15,6 +15,7 @@ properties:
      - enum:
          - qcom,sa8775p-inline-crypto-engine
          - qcom,sc7180-inline-crypto-engine
          - qcom,sc7280-inline-crypto-engine
          - qcom,sm8450-inline-crypto-engine
          - qcom,sm8550-inline-crypto-engine
          - qcom,sm8650-inline-crypto-engine
+28 −2
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@@ -12,7 +12,9 @@ maintainers:

properties:
  compatible:
    const: starfive,jh7110-crypto
    enum:
      - starfive,jh7110-crypto
      - starfive,jh8100-crypto

  reg:
    maxItems: 1
@@ -28,7 +30,10 @@ properties:
      - const: ahb

  interrupts:
    maxItems: 1
    minItems: 1
    items:
      - description: SHA2 module irq
      - description: SM3 module irq

  resets:
    maxItems: 1
@@ -54,6 +59,27 @@ required:

additionalProperties: false

allOf:
  - if:
      properties:
        compatible:
          const: starfive,jh7110-crypto

    then:
      properties:
        interrupts:
          maxItems: 1

  - if:
      properties:
        compatible:
          const: starfive,jh8100-crypto

    then:
      properties:
        interrupts:
          minItems: 2

examples:
  - |
    crypto: crypto@16000000 {
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