Commit 854e9bf5 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge tag 'mlx5-fixes-2024-09-25' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux 

Saeed Mahameed says:

====================
mlx5 fixes 2024-09-25

* tag 'mlx5-fixes-2024-09-25' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux:
  net/mlx5e: Fix crash caused by calling __xfrm_state_delete() twice
  net/mlx5e: SHAMPO, Fix overflow of hd_per_wq
  net/mlx5: HWS, changed E2BIG error to a negative return code
  net/mlx5: HWS, fixed double-free in error flow of creating SQ
  net/mlx5: Fix wrong reserved field in hca_cap_2 in mlx5_ifc
  net/mlx5e: Fix NULL deref in mlx5e_tir_builder_alloc()
  net/mlx5: Added cond_resched() to crdump collection
  net/mlx5: Fix error path in multi-packet WQE transmit
====================

Link: https://patch.msgid.link/20240925202013.45374-1-saeed@kernel.org


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents e5e3f369 7b124695

drivers/net/ethernet/mellanox/mlx5/core/en.h

+1 −1
Original line number Diff line number Diff line
@@ -627,7 +627,7 @@ struct mlx5e_shampo_hd { 
	struct mlx5e_dma_info *info;

	struct mlx5e_frag_page *pages;

	u16 curr_page_index;

	u16 hd_per_wq;

	u32 hd_per_wq;

	u16 hd_per_wqe;

	unsigned long *bitmap;

	u16 pi;

drivers/net/ethernet/mellanox/mlx5/core/en/tir.c

+3 −0
Original line number Diff line number Diff line
@@ -23,6 +23,9 @@ struct mlx5e_tir_builder *mlx5e_tir_builder_alloc(bool modify) 
	struct mlx5e_tir_builder *builder;



	builder = kvzalloc(sizeof(*builder), GFP_KERNEL);

	if (!builder)

		return NULL;



	builder->modify = modify;



	return builder;

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c

+7 −1
Original line number Diff line number Diff line
@@ -67,7 +67,6 @@ static void mlx5e_ipsec_handle_sw_limits(struct work_struct *_work) 
		return;



	spin_lock_bh(&x->lock);

	xfrm_state_check_expire(x);

	if (x->km.state == XFRM_STATE_EXPIRED) {

		sa_entry->attrs.drop = true;

		spin_unlock_bh(&x->lock);
@@ -75,6 +74,13 @@ static void mlx5e_ipsec_handle_sw_limits(struct work_struct *_work) 
		mlx5e_accel_ipsec_fs_modify(sa_entry);

		return;

	}



	if (x->km.state != XFRM_STATE_VALID) {

		spin_unlock_bh(&x->lock);

		return;

	}



	xfrm_state_check_expire(x);

	spin_unlock_bh(&x->lock);



	queue_delayed_work(sa_entry->ipsec->wq, &dwork->dwork,

drivers/net/ethernet/mellanox/mlx5/core/en_tx.c

+0 −1
Original line number Diff line number Diff line
@@ -642,7 +642,6 @@ mlx5e_sq_xmit_mpwqe(struct mlx5e_txqsq *sq, struct sk_buff *skb, 
	return;



err_unmap:

	mlx5e_dma_unmap_wqe_err(sq, 1);

	sq->stats->dropped++;

	dev_kfree_skb_any(skb);

	mlx5e_tx_flush(sq);

drivers/net/ethernet/mellanox/mlx5/core/lib/pci_vsc.c

+10 −0
Original line number Diff line number Diff line
@@ -24,6 +24,11 @@ 
	pci_write_config_dword((dev)->pdev, (dev)->vsc_addr + (offset), (val))

#define VSC_MAX_RETRIES 2048



/* Reading VSC registers can take relatively long time.

 * Yield the cpu every 128 registers read.

 */

#define VSC_GW_READ_BLOCK_COUNT 128



enum {

	VSC_CTRL_OFFSET = 0x4,

	VSC_COUNTER_OFFSET = 0x8,
@@ -273,6 +278,7 @@ int mlx5_vsc_gw_read_block_fast(struct mlx5_core_dev *dev, u32 *data, 
{

	unsigned int next_read_addr = 0;

	unsigned int read_addr = 0;

	unsigned int count = 0;



	while (read_addr < length) {

		if (mlx5_vsc_gw_read_fast(dev, read_addr, &next_read_addr,
@@ -280,6 +286,10 @@ int mlx5_vsc_gw_read_block_fast(struct mlx5_core_dev *dev, u32 *data, 
			return read_addr;



		read_addr = next_read_addr;

		if (++count == VSC_GW_READ_BLOCK_COUNT) {

			cond_resched();

			count = 0;

		}

	}

	return length;

}