Commit 85eb2e57 authored by Parker Newman's avatar Parker Newman Committed by Greg Kroah-Hartman
Browse files

serial: 8250_exar: Replace custom EEPROM read with eeprom_93cx6

Replace the custom 93cx6 EEPROM read functions with the eeprom_93cx6
driver. This removes duplicate code and improves code readability.

Replace exar_ee_read() calls with eeprom_93cx6_read() or
eeprom_93cx6_multiread().

Add "select EEPROM_93CX6" to config SERIAL_8250_EXAR to ensure
eeprom_93cx6 driver is also compiled when 8250_exar driver is selected.

Note: Old exar_ee_read() and associated functions are removed in next
patch in this series.

Link to mailing list discussion with Andy Shevchenko for reference.

Link: https://lore.kernel.org/linux-serial/Ztr5u2wEt8VF1IdI@black.fi.intel.com/


Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarParker Newman <pnewman@connecttech.com>
Link: https://lore.kernel.org/r/1bf2214ae27130ca58b9e779c4d65a0e5db06fc1.1727880931.git.pnewman@connecttech.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent d45109c5
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+45 −13
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/dmi.h>
#include <linux/eeprom_93cx6.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/math.h>
@@ -191,8 +192,7 @@
#define CTI_EE_OFF_XR17V35X_PORT_FLAGS	0x14  /* 1 word */

#define CTI_EE_MASK_PORT_FLAGS_TYPE	GENMASK(7, 0)
#define CTI_EE_MASK_OSC_FREQ_LOWER	GENMASK(15, 0)
#define CTI_EE_MASK_OSC_FREQ_UPPER	GENMASK(31, 16)
#define CTI_EE_MASK_OSC_FREQ		GENMASK(31, 0)

#define CTI_FPGA_RS485_IO_REG		0x2008
#define CTI_FPGA_CFG_INT_EN_REG		0x48
@@ -254,6 +254,7 @@ struct exar8250 {
	unsigned int		nr;
	unsigned int		osc_freq;
	struct exar8250_board	*board;
	struct eeprom_93cx6	eeprom;
	void __iomem		*virt;
	int			line[];
};
@@ -357,6 +358,39 @@ static u16 exar_ee_read(struct exar8250 *priv, u8 ee_addr)
	return data;
}

static void exar_eeprom_93cx6_reg_read(struct eeprom_93cx6 *eeprom)
{
	struct exar8250 *priv = eeprom->data;
	u8 regb = exar_read_reg(priv, UART_EXAR_REGB);

	/* EECK and EECS always read 0 from REGB so only set EEDO */
	eeprom->reg_data_out = regb & UART_EXAR_REGB_EEDO;
}

static void exar_eeprom_93cx6_reg_write(struct eeprom_93cx6 *eeprom)
{
	struct exar8250 *priv = eeprom->data;
	u8 regb = 0;

	if (eeprom->reg_data_in)
		regb |= UART_EXAR_REGB_EEDI;
	if (eeprom->reg_data_clock)
		regb |= UART_EXAR_REGB_EECK;
	if (eeprom->reg_chip_select)
		regb |= UART_EXAR_REGB_EECS;

	exar_write_reg(priv, UART_EXAR_REGB, regb);
}

static void exar_eeprom_init(struct exar8250 *priv)
{
	priv->eeprom.data = priv;
	priv->eeprom.register_read = exar_eeprom_93cx6_reg_read;
	priv->eeprom.register_write = exar_eeprom_93cx6_reg_write;
	priv->eeprom.width = PCI_EEPROM_WIDTH_93C46;
	priv->eeprom.quirks |= PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE;
}

/**
 * exar_mpio_config_output() - Configure an Exar MPIO as an output
 * @priv: Device's private structure
@@ -698,20 +732,16 @@ static int cti_plx_int_enable(struct exar8250 *priv)
 */
static int cti_read_osc_freq(struct exar8250 *priv, u8 eeprom_offset)
{
	u16 lower_word;
	u16 upper_word;
	__le16 ee_words[2];
	u32 osc_freq;

	lower_word = exar_ee_read(priv, eeprom_offset);
	// Check if EEPROM word was blank
	if (lower_word == 0xFFFF)
		return -EIO;
	eeprom_93cx6_multiread(&priv->eeprom, eeprom_offset, ee_words, ARRAY_SIZE(ee_words));

	upper_word = exar_ee_read(priv, (eeprom_offset + 1));
	if (upper_word == 0xFFFF)
	osc_freq = le16_to_cpu(ee_words[0]) | (le16_to_cpu(ee_words[1]) << 16);
	if (osc_freq == CTI_EE_MASK_OSC_FREQ)
		return -EIO;

	return FIELD_PREP(CTI_EE_MASK_OSC_FREQ_LOWER, lower_word) |
	       FIELD_PREP(CTI_EE_MASK_OSC_FREQ_UPPER, upper_word);
	return osc_freq;
}

/**
@@ -835,7 +865,7 @@ static enum cti_port_type cti_get_port_type_xr17v35x(struct exar8250 *priv,
	u8 offset;

	offset = CTI_EE_OFF_XR17V35X_PORT_FLAGS + port_num;
	port_flags = exar_ee_read(priv, offset);
	eeprom_93cx6_read(&priv->eeprom, offset, &port_flags);

	port_type = FIELD_GET(CTI_EE_MASK_PORT_FLAGS_TYPE, port_flags);
	if (CTI_PORT_TYPE_VALID(port_type))
@@ -1553,6 +1583,8 @@ exar_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
	if (rc)
		return rc;

	exar_eeprom_init(priv);

	for (i = 0; i < nr_ports && i < maxnr; i++) {
		rc = board->setup(priv, pcidev, &uart, i);
		if (rc) {
+1 −0
Original line number Diff line number Diff line
@@ -150,6 +150,7 @@ config SERIAL_8250_EXAR
	tristate "8250/16550 Exar/Commtech PCI/PCIe device support"
	depends on SERIAL_8250 && PCI
	select SERIAL_8250_PCILIB
	select EEPROM_93CX6
	default SERIAL_8250
	help
	  This builds support for XR17C1xx, XR17V3xx and some Commtech