Commit 86291f77 authored by Qiang Yu's avatar Qiang Yu Committed by Manivannan Sadhasivam
Browse files

PCI: dwc: Remove duplicate dw_pcie_ep_hide_ext_capability() function 



Remove dw_pcie_ep_hide_ext_capability() and replace its usage with
dw_pcie_remove_ext_capability(). Both functions serve the same purpose
of hiding PCIe extended capabilities, but dw_pcie_remove_ext_capability()
provides a cleaner API that doesn't require the caller to specify the
previous capability ID.

Suggested-by: default avatarNiklas Cassel <cassel@kernel.org>
Signed-off-by: default avatarQiang Yu <qiang.yu@oss.qualcomm.com>
Signed-off-by: default avatarManivannan Sadhasivam <mani@kernel.org>
Tested-by: default avatarNiklas Cassel <cassel@kernel.org>
Link: https://patch.msgid.link/20251224-remove_dw_pcie_ep_hide_ext_capability-v1-1-4302c9cdc316@oss.qualcomm.com
parent 58a17b26

drivers/pci/controller/dwc/pcie-designware-ep.c

+0 −39
Original line number Diff line number Diff line
@@ -75,45 +75,6 @@ static u8 dw_pcie_ep_find_capability(struct dw_pcie_ep *ep, u8 func_no, u8 cap) 
				 cap, NULL, ep, func_no);

}



/**

 * dw_pcie_ep_hide_ext_capability - Hide a capability from the linked list

 * @pci: DWC PCI device

 * @prev_cap: Capability preceding the capability that should be hidden

 * @cap: Capability that should be hidden

 *

 * Return: 0 if success, errno otherwise.

 */

int dw_pcie_ep_hide_ext_capability(struct dw_pcie *pci, u8 prev_cap, u8 cap)

{

	u16 prev_cap_offset, cap_offset;

	u32 prev_cap_header, cap_header;



	prev_cap_offset = dw_pcie_find_ext_capability(pci, prev_cap);

	if (!prev_cap_offset)

		return -EINVAL;



	prev_cap_header = dw_pcie_readl_dbi(pci, prev_cap_offset);

	cap_offset = PCI_EXT_CAP_NEXT(prev_cap_header);

	cap_header = dw_pcie_readl_dbi(pci, cap_offset);



	/* cap must immediately follow prev_cap. */

	if (PCI_EXT_CAP_ID(cap_header) != cap)

		return -EINVAL;



	/* Clear next ptr. */

	prev_cap_header &= ~GENMASK(31, 20);



	/* Set next ptr to next ptr of cap. */

	prev_cap_header |= cap_header & GENMASK(31, 20);



	dw_pcie_dbi_ro_wr_en(pci);

	dw_pcie_writel_dbi(pci, prev_cap_offset, prev_cap_header);

	dw_pcie_dbi_ro_wr_dis(pci);



	return 0;

}

EXPORT_SYMBOL_GPL(dw_pcie_ep_hide_ext_capability);



static int dw_pcie_ep_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no,

				   struct pci_epf_header *hdr)

{

drivers/pci/controller/dwc/pcie-designware.h

+0 −7
Original line number Diff line number Diff line
@@ -912,7 +912,6 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, 
int dw_pcie_ep_raise_msix_irq_doorbell(struct dw_pcie_ep *ep, u8 func_no,

				       u16 interrupt_num);

void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar);

int dw_pcie_ep_hide_ext_capability(struct dw_pcie *pci, u8 prev_cap, u8 cap);

struct dw_pcie_ep_func *

dw_pcie_ep_get_func_from_ep(struct dw_pcie_ep *ep, u8 func_no);

#else
@@ -970,12 +969,6 @@ static inline void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar) 
{

}



static inline int dw_pcie_ep_hide_ext_capability(struct dw_pcie *pci,

						 u8 prev_cap, u8 cap)

{

	return 0;

}



static inline struct dw_pcie_ep_func *

dw_pcie_ep_get_func_from_ep(struct dw_pcie_ep *ep, u8 func_no)

{

drivers/pci/controller/dwc/pcie-dw-rockchip.c

+1 −3
Original line number Diff line number Diff line
@@ -347,9 +347,7 @@ static void rockchip_pcie_ep_hide_broken_ats_cap_rk3588(struct dw_pcie_ep *ep) 
	if (!of_device_is_compatible(dev->of_node, "rockchip,rk3588-pcie-ep"))

		return;



	if (dw_pcie_ep_hide_ext_capability(pci, PCI_EXT_CAP_ID_SECPCI,

					   PCI_EXT_CAP_ID_ATS))

		dev_err(dev, "failed to hide ATS capability\n");

	dw_pcie_remove_ext_capability(pci, PCI_EXT_CAP_ID_ATS);

}



static void rockchip_pcie_ep_init(struct dw_pcie_ep *ep)