Commit 86bcf7be authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv-for-linus-6.18-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux 

Pull more RISC-V updates from Paul Walmsley:

 - Support for the RISC-V-standardized RPMI interface.

   RPMI is a platform management communication mechanism between OSes
   running on application processors, and a remote platform management
   processor. Similar to ARM SCMI, TI SCI, etc. This includes irqchip,
   mailbox, and clk changes.

 - Support for the RISC-V-standardized MPXY SBI extension.

   MPXY is a RISC-V-specific standard implementing a shared memory
   mailbox between S-mode operating systems (e.g., Linux) and M-mode
   firmware (e.g., OpenSBI). It is part of this PR since one of its use
   cases is to enable M-mode firmware to act as a single RPMI client for
   all RPMI activity on a core (including S-mode RPMI activity).
   Includes a mailbox driver.

 - Some ACPI-related updates to enable the use of RPMI and MPXY.

 - The addition of Linux-wide memcpy_{from,to}_le32() static inline
   functions, for RPMI use.

 - An ACPI Kconfig change to enable boot logos on any ACPI-using
   architecture (including RISC-V)

 - A RISC-V defconfig change to add GPIO keyboard and event device
   support, for front panel shutdown or reboot buttons

* tag 'riscv-for-linus-6.18-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (26 commits)
  clk: COMMON_CLK_RPMI should depend on RISCV
  ACPI: support BGRT table on RISC-V
  MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers
  RISC-V: Enable GPIO keyboard and event device in RV64 defconfig
  irqchip/riscv-rpmi-sysmsi: Add ACPI support
  mailbox/riscv-sbi-mpxy: Add ACPI support
  irqchip/irq-riscv-imsic-early: Export imsic_acpi_get_fwnode()
  ACPI: RISC-V: Add RPMI System MSI to GSI mapping
  ACPI: RISC-V: Add support to update gsi range
  ACPI: RISC-V: Create interrupt controller list in sorted order
  ACPI: scan: Update honor list for RPMI System MSI
  ACPI: Add support for nargs_prop in acpi_fwnode_get_reference_args()
  ACPI: property: Refactor acpi_fwnode_get_reference_args() to support nargs_prop
  irqchip: Add driver for the RPMI system MSI service group
  dt-bindings: Add RPMI system MSI interrupt controller bindings
  dt-bindings: Add RPMI system MSI message proxy bindings
  clk: Add clock driver for the RISC-V RPMI clock service group
  dt-bindings: clock: Add RPMI clock service controller bindings
  dt-bindings: clock: Add RPMI clock service message proxy bindings
  mailbox: Add RISC-V SBI message proxy (MPXY) based mailbox driver
  ...
parents 7c738cb4 68247d45

Documentation/devicetree/bindings/clock/riscv,rpmi-clock.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/riscv,rpmi-clock.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: RISC-V RPMI clock service group based clock controller



maintainers:

  - Anup Patel <anup@brainfault.org>



description: |

  The RISC-V Platform Management Interface (RPMI) [1] defines a

  messaging protocol which is modular and extensible. The supervisor

  software can send/receive RPMI messages via SBI MPXY extension [2]

  or some dedicated supervisor-mode RPMI transport.



  The RPMI specification [1] defines clock service group for accessing

  system clocks managed by a platform microcontroller. The supervisor

  software can access RPMI clock service group via SBI MPXY channel or

  some dedicated supervisor-mode RPMI transport.



  ===========================================

  References

  ===========================================



  [1] RISC-V Platform Management Interface (RPMI) v1.0 (or higher)

      https://github.com/riscv-non-isa/riscv-rpmi/releases



  [2] RISC-V Supervisor Binary Interface (SBI) v3.0 (or higher)

      https://github.com/riscv-non-isa/riscv-sbi-doc/releases



properties:

  compatible:

    description:

      Intended for use by the supervisor software.

    const: riscv,rpmi-clock



  mboxes:

    maxItems: 1

    description:

      Mailbox channel of the underlying RPMI transport or SBI message proxy channel.



  "#clock-cells":

    const: 1

    description:

      Platform specific CLOCK_ID as defined by the RISC-V Platform Management

      Interface (RPMI) specification.



required:

  - compatible

  - mboxes

  - "#clock-cells"



additionalProperties: false



examples:

  - |

    clock-controller {

        compatible = "riscv,rpmi-clock";

        mboxes = <&mpxy_mbox 0x1000 0x0>;

        #clock-cells = <1>;

    };

...

Documentation/devicetree/bindings/clock/riscv,rpmi-mpxy-clock.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/riscv,rpmi-mpxy-clock.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: RISC-V RPMI clock service group based message proxy



maintainers:

  - Anup Patel <anup@brainfault.org>



description: |

  The RISC-V Platform Management Interface (RPMI) [1] defines a

  messaging protocol which is modular and extensible. The supervisor

  software can send/receive RPMI messages via SBI MPXY extension [2]

  or some dedicated supervisor-mode RPMI transport.



  The RPMI specification [1] defines clock service group for accessing

  system clocks managed by a platform microcontroller. The SBI implementation

  (machine mode firmware or hypervisor) can implement an SBI MPXY channel

  to allow RPMI clock service group access to the supervisor software.



  ===========================================

  References

  ===========================================



  [1] RISC-V Platform Management Interface (RPMI) v1.0 (or higher)

      https://github.com/riscv-non-isa/riscv-rpmi/releases



  [2] RISC-V Supervisor Binary Interface (SBI) v3.0 (or higher)

      https://github.com/riscv-non-isa/riscv-sbi-doc/releases



properties:

  compatible:

    description:

      Intended for use by the SBI implementation.

    const: riscv,rpmi-mpxy-clock



  mboxes:

    maxItems: 1

    description:

      Mailbox channel of the underlying RPMI transport.



  riscv,sbi-mpxy-channel-id:

    $ref: /schemas/types.yaml#/definitions/uint32

    description:

      The SBI MPXY channel id to be used for providing RPMI access to

      the supervisor software.



required:

  - compatible

  - mboxes

  - riscv,sbi-mpxy-channel-id



additionalProperties: false



examples:

  - |

    clock-service {

        compatible = "riscv,rpmi-mpxy-clock";

        mboxes = <&rpmi_shmem_mbox 0x8>;

        riscv,sbi-mpxy-channel-id = <0x1000>;

    };

...

Documentation/devicetree/bindings/interrupt-controller/riscv,rpmi-mpxy-system-msi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/riscv,rpmi-mpxy-system-msi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: RISC-V RPMI system MSI service group based message proxy



maintainers:

  - Anup Patel <anup@brainfault.org>



description: |

  The RISC-V Platform Management Interface (RPMI) [1] defines a

  messaging protocol which is modular and extensible. The supervisor

  software can send/receive RPMI messages via SBI MPXY extension [2]

  or some dedicated supervisor-mode RPMI transport.



  The RPMI specification [1] defines system MSI service group which

  allow application processors to receive MSIs upon system events

  such as P2A doorbell, graceful shutdown/reboot request, CPU hotplug

  event, memory hotplug event, etc from the platform microcontroller.

  The SBI implementation (machine mode firmware or hypervisor) can

  implement an SBI MPXY channel to allow RPMI system MSI service

  group access to the supervisor software.



  ===========================================

  References

  ===========================================



  [1] RISC-V Platform Management Interface (RPMI) v1.0 (or higher)

      https://github.com/riscv-non-isa/riscv-rpmi/releases



  [2] RISC-V Supervisor Binary Interface (SBI) v3.0 (or higher)

      https://github.com/riscv-non-isa/riscv-sbi-doc/releases



properties:

  compatible:

    description:

      Intended for use by the SBI implementation.

    const: riscv,rpmi-mpxy-system-msi



  mboxes:

    maxItems: 1

    description:

      Mailbox channel of the underlying RPMI transport.



  riscv,sbi-mpxy-channel-id:

    $ref: /schemas/types.yaml#/definitions/uint32

    description:

      The SBI MPXY channel id to be used for providing RPMI access to

      the supervisor software.



required:

  - compatible

  - mboxes

  - riscv,sbi-mpxy-channel-id



additionalProperties: false



examples:

  - |

    interrupt-controller {

        compatible = "riscv,rpmi-mpxy-system-msi";

        mboxes = <&rpmi_shmem_mbox 0x2>;

        riscv,sbi-mpxy-channel-id = <0x2000>;

    };

...

Documentation/devicetree/bindings/interrupt-controller/riscv,rpmi-system-msi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/riscv,rpmi-system-msi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: RISC-V RPMI system MSI service group based interrupt controller



maintainers:

  - Anup Patel <anup@brainfault.org>



description: |

  The RISC-V Platform Management Interface (RPMI) [1] defines a

  messaging protocol which is modular and extensible. The supervisor

  software can send/receive RPMI messages via SBI MPXY extension [2]

  or some dedicated supervisor-mode RPMI transport.



  The RPMI specification [1] defines system MSI service group which

  allow application processors to receive MSIs upon system events

  such as P2A doorbell, graceful shutdown/reboot request, CPU hotplug

  event, memory hotplug event, etc from the platform microcontroller.

  The supervisor software can access RPMI system MSI service group via

  SBI MPXY channel or some dedicated supervisor-mode RPMI transport.



  ===========================================

  References

  ===========================================



  [1] RISC-V Platform Management Interface (RPMI) v1.0 (or higher)

      https://github.com/riscv-non-isa/riscv-rpmi/releases



  [2] RISC-V Supervisor Binary Interface (SBI) v3.0 (or higher)

      https://github.com/riscv-non-isa/riscv-sbi-doc/releases



allOf:

  - $ref: /schemas/interrupt-controller.yaml#



properties:

  compatible:

    description:

      Intended for use by the supervisor software.

    const: riscv,rpmi-system-msi



  mboxes:

    maxItems: 1

    description:

      Mailbox channel of the underlying RPMI transport or SBI message proxy channel.



  msi-parent: true



  interrupt-controller: true



  "#interrupt-cells":

    const: 1



required:

  - compatible

  - mboxes

  - msi-parent

  - interrupt-controller

  - "#interrupt-cells"



additionalProperties: false



examples:

  - |

    interrupt-controller {

        compatible = "riscv,rpmi-system-msi";

        mboxes = <&mpxy_mbox 0x2000 0x0>;

        msi-parent = <&imsic_slevel>;

        interrupt-controller;

        #interrupt-cells = <1>;

    };

...

Documentation/devicetree/bindings/mailbox/riscv,rpmi-shmem-mbox.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/mailbox/riscv,rpmi-shmem-mbox.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: RISC-V Platform Management Interface (RPMI) shared memory mailbox



maintainers:

  - Anup Patel <anup@brainfault.org>



description: |

  The RISC-V Platform Management Interface (RPMI) [1] defines a common shared

  memory based RPMI transport. This RPMI shared memory transport integrates as

  mailbox controller in the SBI implementation or supervisor software whereas

  each RPMI service group is mailbox client in the SBI implementation and

  supervisor software.



  ===========================================

  References

  ===========================================



  [1] RISC-V Platform Management Interface (RPMI) v1.0 (or higher)

      https://github.com/riscv-non-isa/riscv-rpmi/releases



properties:

  compatible:

    const: riscv,rpmi-shmem-mbox



  reg:

    minItems: 2

    items:

      - description: A2P request queue base address

      - description: P2A acknowledgment queue base address

      - description: P2A request queue base address

      - description: A2P acknowledgment queue base address

      - description: A2P doorbell address



  reg-names:

    minItems: 2

    items:

      - const: a2p-req

      - const: p2a-ack

      - enum: [ p2a-req, a2p-doorbell ]

      - const: a2p-ack

      - const: a2p-doorbell



  interrupts:

    maxItems: 1

    description:

      The RPMI shared memory transport supports P2A doorbell as a wired

      interrupt and this property specifies the interrupt source.



  msi-parent:

    description:

      The RPMI shared memory transport supports P2A doorbell as a system MSI

      and this property specifies the target MSI controller.



  riscv,slot-size:

    $ref: /schemas/types.yaml#/definitions/uint32

    minimum: 64

    description:

      Power-of-2 RPMI slot size of the RPMI shared memory transport.



  riscv,a2p-doorbell-value:

    $ref: /schemas/types.yaml#/definitions/uint32

    default: 0x1

    description:

      Value written to the 32-bit A2P doorbell register.



  riscv,p2a-doorbell-sysmsi-index:

    $ref: /schemas/types.yaml#/definitions/uint32

    description:

      The RPMI shared memory transport supports P2A doorbell as a system MSI

      and this property specifies system MSI index to be used for configuring

      the P2A doorbell MSI.



  "#mbox-cells":

    const: 1

    description:

      The first cell specifies RPMI service group ID.



required:

  - compatible

  - reg

  - reg-names

  - riscv,slot-size

  - "#mbox-cells"



anyOf:

  - required:

      - interrupts

  - required:

      - msi-parent



additionalProperties: false



examples:

  - |

    // Example 1 (RPMI shared memory with only 2 queues):

    mailbox@10080000 {

        compatible = "riscv,rpmi-shmem-mbox";

        reg = <0x10080000 0x10000>,

              <0x10090000 0x10000>;

        reg-names = "a2p-req", "p2a-ack";

        msi-parent = <&imsic_mlevel>;

        riscv,slot-size = <64>;

        #mbox-cells = <1>;

    };

  - |

    // Example 2 (RPMI shared memory with only 4 queues):

    mailbox@10001000 {

        compatible = "riscv,rpmi-shmem-mbox";

        reg = <0x10001000 0x800>,

              <0x10001800 0x800>,

              <0x10002000 0x800>,

              <0x10002800 0x800>,

              <0x10003000 0x4>;

        reg-names = "a2p-req", "p2a-ack", "p2a-req", "a2p-ack", "a2p-doorbell";

        msi-parent = <&imsic_mlevel>;

        riscv,slot-size = <64>;

        riscv,a2p-doorbell-value = <0x00008000>;

        #mbox-cells = <1>;

    };