Commit 8736d17a authored by Yang Wang's avatar Yang Wang Committed by Alex Deucher
Browse files

drm/amdgpu: add RAS error info support for mmhub_v1_8 



add RAS error info support for mmhub_v1_8.

Signed-off-by: default avatarYang Wang <kevinyang.wang@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 156c2814

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

+13 −2
Original line number Diff line number Diff line
@@ -626,6 +626,14 @@ static void mmhub_v1_8_inst_query_ras_error_count(struct amdgpu_device *adev, 
						  void *ras_err_status)

{

	struct ras_err_data *err_data = (struct ras_err_data *)ras_err_status;

	unsigned long ue_count = 0, ce_count = 0;



	/* NOTE: mmhub is converted by aid_mask and the range is 0-3,

	 * which can be used as die ID directly */

	struct amdgpu_smuio_mcm_config_info mcm_info = {

		.socket_id = adev->smuio.funcs->get_socket_id(adev),

		.die_id = mmhub_inst,

	};



	amdgpu_ras_inst_query_ras_error_count(adev,

					mmhub_v1_8_ce_reg_list,
@@ -634,7 +642,7 @@ static void mmhub_v1_8_inst_query_ras_error_count(struct amdgpu_device *adev, 
					ARRAY_SIZE(mmhub_v1_8_ras_memory_list),

					mmhub_inst,

					AMDGPU_RAS_ERROR__SINGLE_CORRECTABLE,

					&err_data->ce_count);

					&ce_count);

	amdgpu_ras_inst_query_ras_error_count(adev,

					mmhub_v1_8_ue_reg_list,

					ARRAY_SIZE(mmhub_v1_8_ue_reg_list),
@@ -642,7 +650,10 @@ static void mmhub_v1_8_inst_query_ras_error_count(struct amdgpu_device *adev, 
					ARRAY_SIZE(mmhub_v1_8_ras_memory_list),

					mmhub_inst,

					AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE,

					&err_data->ue_count);

					&ue_count);



	amdgpu_ras_error_statistic_ce_count(err_data, &mcm_info, ce_count);

	amdgpu_ras_error_statistic_ue_count(err_data, &mcm_info, ue_count);

}



static void mmhub_v1_8_query_ras_error_count(struct amdgpu_device *adev,