Unverified Commit 8776b023 authored by Tejas Upadhyay's avatar Tejas Upadhyay Committed by Rodrigo Vivi
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drm/xe/xe2hpg: Add Wa_14021821874 



Wa_14021821874 applies to xe2_hpg

V2(Himal):
  - Use space after define

Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarHimal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: default avatarTejas Upadhyay <tejas.upadhyay@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240812134117.813670-1-tejas.upadhyay@intel.com


(cherry picked from commit 21ff3a16)
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent f5cb1275

drivers/gpu/drm/xe/regs/xe_gt_regs.h

+1 −0
Original line number Diff line number Diff line
@@ -437,6 +437,7 @@ 
#define   DIS_FIX_EOT1_FLUSH			REG_BIT(9)



#define TDL_TSL_CHICKEN				XE_REG_MCR(0xe4c4, XE_REG_OPTION_MASKED)

#define   STK_ID_RESTRICT			REG_BIT(12)

#define   SLM_WMTP_RESTORE			REG_BIT(11)



#define ROW_CHICKEN				XE_REG_MCR(0xe4f0, XE_REG_OPTION_MASKED)

drivers/gpu/drm/xe/xe_wa.c

+4 −0
Original line number Diff line number Diff line
@@ -542,6 +542,10 @@ static const struct xe_rtp_entry_sr engine_was[] = { 
	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),

	  XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))

	},

	{ XE_RTP_NAME("14021821874"),

	  XE_RTP_RULES(GRAPHICS_VERSION(2001), FUNC(xe_rtp_match_first_render_or_compute)),

	  XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))

	},



	/* Xe2_LPM */