Commit 87b78a5d authored by James Morse's avatar James Morse
Browse files

arm64: mpam: Re-initialise MPAM regs when CPU comes online 



Now that the MPAM system registers are expected to have values that change,
reprogram them based on the previous value when a CPU is brought online.

Previously MPAM's 'default PARTID' of 0 was always used for MPAM in
kernel-space as this is the PARTID that hardware guarantees to
reset. Because there are a limited number of PARTID, this value is exposed
to user-space, meaning resctrl changes to the resctrl default group would
also affect kernel threads.  Instead, use the task's PARTID value for
kernel work on behalf of user-space too. The default of 0 is kept for both
user-space and kernel-space when MPAM is not enabled.

Tested-by: default avatarGavin Shan <gshan@redhat.com>
Tested-by: default avatarShaopeng Tan <tan.shaopeng@jp.fujitsu.com>
Tested-by: default avatarPeter Newman <peternewman@google.com>
Tested-by: default avatarZeng Heng <zengheng4@huawei.com>
Tested-by: default avatarPunit Agrawal <punit.agrawal@oss.qualcomm.com>
Tested-by: default avatarJesse Chick <jessechick@os.amperecomputing.com>
Reviewed-by: default avatarZeng Heng <zengheng4@huawei.com>
Reviewed-by: default avatarShaopeng Tan <tan.shaopeng@jp.fujitsu.com>
Reviewed-by: default avatarJonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: default avatarGavin Shan <gshan@redhat.com>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Co-developed-by: default avatarBen Horgan <ben.horgan@arm.com>
Signed-off-by: default avatarBen Horgan <ben.horgan@arm.com>
Signed-off-by: default avatarJames Morse <james.morse@arm.com>
parent 8e06d04f

arch/arm64/kernel/cpufeature.c

+12 −7
Original line number Diff line number Diff line
@@ -86,6 +86,7 @@ 
#include <asm/kvm_host.h>

#include <asm/mmu.h>

#include <asm/mmu_context.h>

#include <asm/mpam.h>

#include <asm/mte.h>

#include <asm/hypervisor.h>

#include <asm/processor.h>
@@ -2492,13 +2493,17 @@ test_has_mpam(const struct arm64_cpu_capabilities *entry, int scope) 
static void

cpu_enable_mpam(const struct arm64_cpu_capabilities *entry)

{

	/*

	 * Access by the kernel (at EL1) should use the reserved PARTID

	 * which is configured unrestricted. This avoids priority-inversion

	 * where latency sensitive tasks have to wait for a task that has

	 * been throttled to release the lock.

	 */

	write_sysreg_s(0, SYS_MPAM1_EL1);

	int cpu = smp_processor_id();

	u64 regval = 0;



	if (IS_ENABLED(CONFIG_ARM64_MPAM) && static_branch_likely(&mpam_enabled))

		regval = READ_ONCE(per_cpu(arm64_mpam_current, cpu));



	write_sysreg_s(regval | MPAM1_EL1_MPAMEN, SYS_MPAM1_EL1);

	isb();



	/* Synchronising the EL0 write is left until the ERET to EL0 */

	write_sysreg_s(regval, SYS_MPAM0_EL1);

}



static bool