Unverified Commit 88782493 authored by Cosmin Tanislav's avatar Cosmin Tanislav Committed by Mark Brown
Browse files

spi: rzv2h-rspi: avoid recomputing transfer frequency 



Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have a more
complicated algorithm for calculating the optimal SPI transfer frequency
compared to RZ/V2H, as the clock from which the SPI frequency is
generated supports multiple dividers.

Cache the requested transfer frequency and skip calling
rzv2h_rspi_setup_clock() if it matches the last used one to prepare for
adding support for variable clock frequency handling.

Signed-off-by: default avatarCosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Link: https://patch.msgid.link/20251119161434.595677-6-cosmin-gabriel.tanislav.xa@renesas.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 1b7ce968

drivers/spi/spi-rzv2h-rspi.c

+8 −3
Original line number Diff line number Diff line
@@ -81,6 +81,7 @@ struct rzv2h_rspi_priv { 
	struct clk *tclk;

	wait_queue_head_t wait;

	unsigned int bytes_per_word;

	u32 last_speed_hz;

	u32 freq;

	u16 status;

	u8 spr;
@@ -298,10 +299,14 @@ static int rzv2h_rspi_prepare_message(struct spi_controller *ctlr, 


	rspi->bytes_per_word = roundup_pow_of_two(BITS_TO_BYTES(bits_per_word));



	if (speed_hz != rspi->last_speed_hz) {

		rspi->freq = rzv2h_rspi_setup_clock(rspi, speed_hz);

		if (!rspi->freq)

			return -EINVAL;



		rspi->last_speed_hz = speed_hz;

	}



	writeb(rspi->spr, rspi->base + RSPI_SPBR);



	/* Configure the device to work in "host" mode */