Commit 888c7f99 authored by Matthew Brost's avatar Matthew Brost
Browse files

drm/xe: Add normalize_invalidation_range 



Extract the code that determines the alignment of TLB invalidation into
a helper function — normalize_invalidation_range. This will be useful
when adding context-based invalidations to the GuC TLB invalidation
backend.

Signed-off-by: default avatarNirmoy Das <nirmoy.das@intel.com>
Signed-off-by: default avatarMatthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarStuart Summers <stuart.summers@intel.com>
Tested-by: default avatarStuart Summers <stuart.summers@intel.com>
Link: https://patch.msgid.link/20260116221731.868657-2-matthew.brost@intel.com
parent 769d7774

drivers/gpu/drm/xe/xe_guc_tlb_inval.c

+35 −36
Original line number Diff line number Diff line
@@ -111,6 +111,38 @@ static int send_page_reclaim(struct xe_guc *guc, u32 seqno, 
			      G2H_LEN_DW_PAGE_RECLAMATION, 1);

}



static u64 normalize_invalidation_range(struct xe_gt *gt, u64 *start, u64 *end)

{

	u64 orig_start = *start;

	u64 length = *end - *start;

	u64 align;



	if (length < SZ_4K)

		length = SZ_4K;



	align = roundup_pow_of_two(length);

	*start = ALIGN_DOWN(*start, align);

	*end = ALIGN(*end, align);

	length = align;

	while (*start + length < *end) {

		length <<= 1;

		*start = ALIGN_DOWN(orig_start, length);

	}



	if (length >= SZ_2M) {

		length = max_t(u64, SZ_16M, length);

		*start = ALIGN_DOWN(orig_start, length);

	}



	xe_gt_assert(gt, length >= SZ_4K);

	xe_gt_assert(gt, is_power_of_2(length));

	xe_gt_assert(gt, !(length & GENMASK(ilog2(SZ_16M) - 1,

					    ilog2(SZ_2M) + 1)));

	xe_gt_assert(gt, IS_ALIGNED(*start, length));



	return length;

}



/*

 * Ensure that roundup_pow_of_two(length) doesn't overflow.

 * Note that roundup_pow_of_two() operates on unsigned long,
@@ -138,48 +170,15 @@ static int send_tlb_inval_ppgtt(struct xe_tlb_inval *tlb_inval, u32 seqno, 
	    length > MAX_RANGE_TLB_INVALIDATION_LENGTH) {

		action[len++] = MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL);

	} else {

		u64 orig_start = start;

		u64 align;



		if (length < SZ_4K)

			length = SZ_4K;



		/*

		 * We need to invalidate a higher granularity if start address

		 * is not aligned to length. When start is not aligned with

		 * length we need to find the length large enough to create an

		 * address mask covering the required range.

		 */

		align = roundup_pow_of_two(length);

		start = ALIGN_DOWN(start, align);

		end = ALIGN(end, align);

		length = align;

		while (start + length < end) {

			length <<= 1;

			start = ALIGN_DOWN(orig_start, length);

		}



		/*

		 * Minimum invalidation size for a 2MB page that the hardware

		 * expects is 16MB

		 */

		if (length >= SZ_2M) {

			length = max_t(u64, SZ_16M, length);

			start = ALIGN_DOWN(orig_start, length);

		}



		xe_gt_assert(gt, length >= SZ_4K);

		xe_gt_assert(gt, is_power_of_2(length));

		xe_gt_assert(gt, !(length & GENMASK(ilog2(SZ_16M) - 1,

						    ilog2(SZ_2M) + 1)));

		xe_gt_assert(gt, IS_ALIGNED(start, length));

		u64 normalize_len = normalize_invalidation_range(gt, &start,

								 &end);



		/* Flush on NULL case, Media is not required to modify flush due to no PPC so NOP */

		action[len++] = MAKE_INVAL_OP_FLUSH(XE_GUC_TLB_INVAL_PAGE_SELECTIVE, !prl_sa);

		action[len++] = asid;

		action[len++] = lower_32_bits(start);

		action[len++] = upper_32_bits(start);

		action[len++] = ilog2(length) - ilog2(SZ_4K);

		action[len++] = ilog2(normalize_len) - ilog2(SZ_4K);

	}



	xe_gt_assert(gt, len <= MAX_TLB_INVALIDATION_LEN);