Commit 88dcad2d authored by David (Ming Qiang) Wu's avatar David (Ming Qiang) Wu Committed by Alex Deucher
Browse files

drm/amd/amdgpu: apply command submission parser for JPEG v2+ 



This patch extends the same cs parser from JPEG v4.0.3 to
other JPEG versions (v2 and above).

Rename to more common name as jpeg_v2_dec_ring_parse_cs()
from jpeg_v4_0_3_dec_ring_parse_cs().

Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarDavid (Ming Qiang) Wu <David.Wu3@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fedf6db3

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

+62 −1
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 


#include "amdgpu.h"

#include "amdgpu_jpeg.h"

#include "amdgpu_cs.h"

#include "amdgpu_pm.h"

#include "soc15.h"

#include "soc15d.h"
@@ -538,6 +539,10 @@ void jpeg_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring, 


	amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET,

		0, 0, PACKETJ_TYPE0));



	if (ring->funcs->parse_cs)

		amdgpu_ring_write(ring, 0);

	else

		amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));



	amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JPEG_VMID_INTERNAL_OFFSET,
@@ -764,6 +769,7 @@ static const struct amdgpu_ring_funcs jpeg_v2_0_dec_ring_vm_funcs = { 
	.get_rptr = jpeg_v2_0_dec_ring_get_rptr,

	.get_wptr = jpeg_v2_0_dec_ring_get_wptr,

	.set_wptr = jpeg_v2_0_dec_ring_set_wptr,

	.parse_cs = jpeg_v2_dec_ring_parse_cs,

	.emit_frame_size =

		SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +

		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +
@@ -810,3 +816,58 @@ const struct amdgpu_ip_block_version jpeg_v2_0_ip_block = { 
		.rev = 0,

		.funcs = &jpeg_v2_0_ip_funcs,

};



/**

 * jpeg_v2_dec_ring_parse_cs - command submission parser

 *

 * @parser: Command submission parser context

 * @job: the job to parse

 * @ib: the IB to parse

 *

 * Parse the command stream, return -EINVAL for invalid packet,

 * 0 otherwise

 */

int jpeg_v2_dec_ring_parse_cs(struct amdgpu_cs_parser *parser,

			      struct amdgpu_job *job,

			      struct amdgpu_ib *ib)

{

	u32 i, reg, res, cond, type;

	struct amdgpu_device *adev = parser->adev;



	for (i = 0; i < ib->length_dw ; i += 2) {

		reg  = CP_PACKETJ_GET_REG(ib->ptr[i]);

		res  = CP_PACKETJ_GET_RES(ib->ptr[i]);

		cond = CP_PACKETJ_GET_COND(ib->ptr[i]);

		type = CP_PACKETJ_GET_TYPE(ib->ptr[i]);



		if (res) /* only support 0 at the moment */

			return -EINVAL;



		switch (type) {

		case PACKETJ_TYPE0:

			if (cond != PACKETJ_CONDITION_CHECK0 || reg < JPEG_REG_RANGE_START ||

			    reg > JPEG_REG_RANGE_END) {

				dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);

				return -EINVAL;

			}

			break;

		case PACKETJ_TYPE3:

			if (cond != PACKETJ_CONDITION_CHECK3 || reg < JPEG_REG_RANGE_START ||

			    reg > JPEG_REG_RANGE_END) {

				dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);

				return -EINVAL;

			}

			break;

		case PACKETJ_TYPE6:

			if (ib->ptr[i] == CP_PACKETJ_NOP)

				continue;

			dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);

			return -EINVAL;

		default:

			dev_err(adev->dev, "Unknown packet type %d !\n", type);

			return -EINVAL;

		}

	}



	return 0;

}

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h

+6 −0
Original line number Diff line number Diff line
@@ -45,6 +45,9 @@ 


#define JRBC_DEC_EXTERNAL_REG_WRITE_ADDR				0x18000



#define JPEG_REG_RANGE_START						0x4000

#define JPEG_REG_RANGE_END						0x41c2



void jpeg_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring);

void jpeg_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring);

void jpeg_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
@@ -57,6 +60,9 @@ void jpeg_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring, 
				unsigned vmid, uint64_t pd_addr);

void jpeg_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);

void jpeg_v2_0_dec_ring_nop(struct amdgpu_ring *ring, uint32_t count);

int jpeg_v2_dec_ring_parse_cs(struct amdgpu_cs_parser *parser,

			      struct amdgpu_job *job,

			      struct amdgpu_ib *ib);



extern const struct amdgpu_ip_block_version jpeg_v2_0_ip_block;

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

+2 −0
Original line number Diff line number Diff line
@@ -662,6 +662,7 @@ static const struct amdgpu_ring_funcs jpeg_v2_5_dec_ring_vm_funcs = { 
	.get_rptr = jpeg_v2_5_dec_ring_get_rptr,

	.get_wptr = jpeg_v2_5_dec_ring_get_wptr,

	.set_wptr = jpeg_v2_5_dec_ring_set_wptr,

	.parse_cs = jpeg_v2_dec_ring_parse_cs,

	.emit_frame_size =

		SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +

		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +
@@ -691,6 +692,7 @@ static const struct amdgpu_ring_funcs jpeg_v2_6_dec_ring_vm_funcs = { 
	.get_rptr = jpeg_v2_5_dec_ring_get_rptr,

	.get_wptr = jpeg_v2_5_dec_ring_get_wptr,

	.set_wptr = jpeg_v2_5_dec_ring_set_wptr,

	.parse_cs = jpeg_v2_dec_ring_parse_cs,

	.emit_frame_size =

		SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +

		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

+1 −0
Original line number Diff line number Diff line
@@ -560,6 +560,7 @@ static const struct amdgpu_ring_funcs jpeg_v3_0_dec_ring_vm_funcs = { 
	.get_rptr = jpeg_v3_0_dec_ring_get_rptr,

	.get_wptr = jpeg_v3_0_dec_ring_get_wptr,

	.set_wptr = jpeg_v3_0_dec_ring_set_wptr,

	.parse_cs = jpeg_v2_dec_ring_parse_cs,

	.emit_frame_size =

		SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +

		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

+1 −0
Original line number Diff line number Diff line
@@ -727,6 +727,7 @@ static const struct amdgpu_ring_funcs jpeg_v4_0_dec_ring_vm_funcs = { 
	.get_rptr = jpeg_v4_0_dec_ring_get_rptr,

	.get_wptr = jpeg_v4_0_dec_ring_get_wptr,

	.set_wptr = jpeg_v4_0_dec_ring_set_wptr,

	.parse_cs = jpeg_v2_dec_ring_parse_cs,

	.emit_frame_size =

		SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +

		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +