Commit 890daede authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv-for-linus-6.11-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux 

Pull RISC-V fixes from Palmer Dabbelt:

 - A revert for the mmap() change that ties the allocation range to the
   hint adress, as what we tried to do ended up regressing on other
   userspace workloads.

 - A fix to avoid a kernel memory leak when emulating misaligned
   accesses from userspace.

 - A Kconfig fix for toolchain vector detection, which now correctly
   detects vector support on toolchains where the V extension depends on
   the M extension.

 - A fix to avoid failing the linear mapping bootmem bounds check on
   NOMMU systems.

 - A fix for early alternatives on relocatable kernels.

* tag 'riscv-for-linus-6.11-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Fix RISCV_ALTERNATIVE_EARLY
  riscv: Do not restrict memory size because of linear mapping on nommu
  riscv: Fix toolchain vector detection
  riscv: misaligned: Restrict user access to kernel memory
  riscv: mm: Do not restrict mmap address based on hint
  riscv: selftests: Remove mmap hint address checks
  Revert "RISC-V: mm: Document mmap changes"
parents a78d7dce 1ff95eb2

Documentation/arch/riscv/vm-layout.rst

+0 −16
Original line number Diff line number Diff line
@@ -134,19 +134,3 @@ RISC-V Linux Kernel SV57 
   ffffffff00000000 |  -4     GB | ffffffff7fffffff |    2 GB | modules, BPF

   ffffffff80000000 |  -2     GB | ffffffffffffffff |    2 GB | kernel

  __________________|____________|__________________|_________|____________________________________________________________
 




Userspace VAs

--------------------

To maintain compatibility with software that relies on the VA space with a

maximum of 48 bits the kernel will, by default, return virtual addresses to

userspace from a 48-bit range (sv48). This default behavior is achieved by

passing 0 into the hint address parameter of mmap. On CPUs with an address space

smaller than sv48, the CPU maximum supported address space will be the default.



Software can "opt-in" to receiving VAs from another VA space by providing

a hint address to mmap. When a hint address is passed to mmap, the returned

address will never use more bits than the hint address. For example, if a hint

address of `1 << 40` is passed to mmap, a valid returned address will never use

bits 41 through 63. If no mappable addresses are available in that range, mmap

will return `MAP_FAILED`.

arch/riscv/Kconfig

+2 −2
Original line number Diff line number Diff line
@@ -552,8 +552,8 @@ config RISCV_ISA_SVPBMT 
config TOOLCHAIN_HAS_V

	bool

	default y

	depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64iv)

	depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32iv)

	depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64imv)

	depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32imv)

	depends on LLD_VERSION >= 140000 || LD_VERSION >= 23800

	depends on AS_HAS_OPTION_ARCH

arch/riscv/include/asm/processor.h

+2 −24
Original line number Diff line number Diff line
@@ -14,36 +14,14 @@ 


#include <asm/ptrace.h>



/*

 * addr is a hint to the maximum userspace address that mmap should provide, so

 * this macro needs to return the largest address space available so that

 * mmap_end < addr, being mmap_end the top of that address space.

 * See Documentation/arch/riscv/vm-layout.rst for more details.

 */

#define arch_get_mmap_end(addr, len, flags)			\

({								\

	unsigned long mmap_end;					\

	typeof(addr) _addr = (addr);				\

	if ((_addr) == 0 || is_compat_task() ||			\

	    ((_addr + len) > BIT(VA_BITS - 1)))			\

		mmap_end = STACK_TOP_MAX;			\

	else							\

		mmap_end = (_addr + len);			\

	mmap_end;						\

	STACK_TOP_MAX;						\

})



#define arch_get_mmap_base(addr, base)				\

({								\

	unsigned long mmap_base;				\

	typeof(addr) _addr = (addr);				\

	typeof(base) _base = (base);				\

	unsigned long rnd_gap = DEFAULT_MAP_WINDOW - (_base);	\

	if ((_addr) == 0 || is_compat_task() || 		\

	    ((_addr + len) > BIT(VA_BITS - 1)))			\

		mmap_base = (_base);				\

	else							\

		mmap_base = (_addr + len) - rnd_gap;		\

	mmap_base;						\

	base;							\

})



#ifdef CONFIG_64BIT

arch/riscv/include/asm/sbi.h

+19 −1
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 


#include <linux/types.h>

#include <linux/cpumask.h>

#include <linux/jump_label.h>



#ifdef CONFIG_RISCV_SBI

enum sbi_ext_id {
@@ -304,6 +305,7 @@ struct sbiret { 
};



void sbi_init(void);

long __sbi_base_ecall(int fid);

struct sbiret __sbi_ecall(unsigned long arg0, unsigned long arg1,

			  unsigned long arg2, unsigned long arg3,

			  unsigned long arg4, unsigned long arg5,
@@ -373,7 +375,23 @@ static inline unsigned long sbi_mk_version(unsigned long major, 
		| (minor & SBI_SPEC_VERSION_MINOR_MASK);

}



int sbi_err_map_linux_errno(int err);

static inline int sbi_err_map_linux_errno(int err)

{

	switch (err) {

	case SBI_SUCCESS:

		return 0;

	case SBI_ERR_DENIED:

		return -EPERM;

	case SBI_ERR_INVALID_PARAM:

		return -EINVAL;

	case SBI_ERR_INVALID_ADDRESS:

		return -EFAULT;

	case SBI_ERR_NOT_SUPPORTED:

	case SBI_ERR_FAILURE:

	default:

		return -ENOTSUPP;

	};

}



extern bool sbi_debug_console_available;

int sbi_debug_console_write(const char *bytes, unsigned int num_bytes);

arch/riscv/kernel/Makefile

+5 −1
Original line number Diff line number Diff line
@@ -20,17 +20,21 @@ endif 
ifdef CONFIG_RISCV_ALTERNATIVE_EARLY

CFLAGS_alternative.o := -mcmodel=medany

CFLAGS_cpufeature.o := -mcmodel=medany

CFLAGS_sbi_ecall.o := -mcmodel=medany

ifdef CONFIG_FTRACE

CFLAGS_REMOVE_alternative.o = $(CC_FLAGS_FTRACE)

CFLAGS_REMOVE_cpufeature.o = $(CC_FLAGS_FTRACE)

CFLAGS_REMOVE_sbi_ecall.o = $(CC_FLAGS_FTRACE)

endif

ifdef CONFIG_RELOCATABLE

CFLAGS_alternative.o += -fno-pie

CFLAGS_cpufeature.o += -fno-pie

CFLAGS_sbi_ecall.o += -fno-pie

endif

ifdef CONFIG_KASAN

KASAN_SANITIZE_alternative.o := n

KASAN_SANITIZE_cpufeature.o := n

KASAN_SANITIZE_sbi_ecall.o := n

endif

endif
@@ -88,7 +92,7 @@ obj-$(CONFIG_DYNAMIC_FTRACE) += mcount-dyn.o 


obj-$(CONFIG_PERF_EVENTS)	+= perf_callchain.o

obj-$(CONFIG_HAVE_PERF_REGS)	+= perf_regs.o

obj-$(CONFIG_RISCV_SBI)		+= sbi.o

obj-$(CONFIG_RISCV_SBI)		+= sbi.o sbi_ecall.o

ifeq ($(CONFIG_RISCV_SBI), y)

obj-$(CONFIG_SMP)		+= sbi-ipi.o

obj-$(CONFIG_SMP) += cpu_ops_sbi.o