Loading drivers/i2c/busses/i2c-tegra.c +26 −15 Original line number Diff line number Diff line Loading @@ -446,6 +446,29 @@ static int tegra_i2c_runtime_suspend(struct device *dev) return pinctrl_pm_select_idle_state(i2c_dev->dev); } static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev) { unsigned long reg_offset; void __iomem *addr; u32 val; int err; if (i2c_dev->hw->has_config_load_reg) { reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_CONFIG_LOAD); addr = i2c_dev->base + reg_offset; i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD); err = readl_poll_timeout(addr, val, val == 0, 1000, I2C_CONFIG_LOAD_TIMEOUT); if (err) { dev_warn(i2c_dev->dev, "timeout waiting for config load\n"); return err; } } return 0; } static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) { u32 val; Loading Loading @@ -500,21 +523,9 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) if (i2c_dev->is_multimaster_mode && i2c_dev->hw->has_slcg_override_reg) i2c_writel(i2c_dev, I2C_MST_CORE_CLKEN_OVR, I2C_CLKEN_OVERRIDE); if (i2c_dev->hw->has_config_load_reg) { unsigned long reg_offset; void __iomem *addr; reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_CONFIG_LOAD); addr = i2c_dev->base + reg_offset; i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD); err = readl_poll_timeout(addr, val, val == 0, 1000, I2C_CONFIG_LOAD_TIMEOUT); if (err) { dev_warn(i2c_dev->dev, "timeout waiting for config load\n"); err = tegra_i2c_wait_for_config_load(i2c_dev); if (err) goto err; } } if (i2c_dev->irq_disabled) { i2c_dev->irq_disabled = 0; Loading Loading
drivers/i2c/busses/i2c-tegra.c +26 −15 Original line number Diff line number Diff line Loading @@ -446,6 +446,29 @@ static int tegra_i2c_runtime_suspend(struct device *dev) return pinctrl_pm_select_idle_state(i2c_dev->dev); } static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev) { unsigned long reg_offset; void __iomem *addr; u32 val; int err; if (i2c_dev->hw->has_config_load_reg) { reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_CONFIG_LOAD); addr = i2c_dev->base + reg_offset; i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD); err = readl_poll_timeout(addr, val, val == 0, 1000, I2C_CONFIG_LOAD_TIMEOUT); if (err) { dev_warn(i2c_dev->dev, "timeout waiting for config load\n"); return err; } } return 0; } static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) { u32 val; Loading Loading @@ -500,21 +523,9 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) if (i2c_dev->is_multimaster_mode && i2c_dev->hw->has_slcg_override_reg) i2c_writel(i2c_dev, I2C_MST_CORE_CLKEN_OVR, I2C_CLKEN_OVERRIDE); if (i2c_dev->hw->has_config_load_reg) { unsigned long reg_offset; void __iomem *addr; reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_CONFIG_LOAD); addr = i2c_dev->base + reg_offset; i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD); err = readl_poll_timeout(addr, val, val == 0, 1000, I2C_CONFIG_LOAD_TIMEOUT); if (err) { dev_warn(i2c_dev->dev, "timeout waiting for config load\n"); err = tegra_i2c_wait_for_config_load(i2c_dev); if (err) goto err; } } if (i2c_dev->irq_disabled) { i2c_dev->irq_disabled = 0; Loading