Commit 892e7b8c authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvm-x86-vmx-6.14' of https://github.com/kvm-x86/linux into HEAD 

KVM VMX changes for 6.14:

 - Fix a bug where KVM updates hardware's APICv cache of the highest ISR bit
   while L2 is active, while ultimately results in a hardware-accelerated L1
   EOI effectively being lost.

 - Honor event priority when emulating Posted Interrupt delivery during nested
   VM-Enter by queueing KVM_REQ_EVENT instead of immediately handling the
   interrupt.

 - Drop kvm_x86_ops.hwapic_irr_update() as KVM updates hardware's APICv cache
   prior to every VM-Enter.

 - Rework KVM's processing of the Page-Modification Logging buffer to reap
   entries in the same order they were created, i.e. to mark gfns dirty in the
   same order that hardware marked the page/PTE dirty.

 - Misc cleanups.
parents 672162a0 37c3ddfe

arch/x86/include/asm/kvm-x86-ops.h

+0 −1
Original line number Diff line number Diff line
@@ -83,7 +83,6 @@ KVM_X86_OP(enable_nmi_window) 
KVM_X86_OP(enable_irq_window)

KVM_X86_OP_OPTIONAL(update_cr8_intercept)

KVM_X86_OP(refresh_apicv_exec_ctrl)

KVM_X86_OP_OPTIONAL(hwapic_irr_update)

KVM_X86_OP_OPTIONAL(hwapic_isr_update)

KVM_X86_OP_OPTIONAL(load_eoi_exitmap)

KVM_X86_OP_OPTIONAL(set_virtual_apic_mode)

arch/x86/include/asm/kvm_host.h

+1 −2
Original line number Diff line number Diff line
@@ -1734,8 +1734,7 @@ struct kvm_x86_ops { 
	const unsigned long required_apicv_inhibits;

	bool allow_apicv_in_x2apic_without_x2apic_virtualization;

	void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);

	void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);

	void (*hwapic_isr_update)(int isr);

	void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);

	void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);

	void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);

	void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);

arch/x86/kvm/lapic.c

+15 −10
Original line number Diff line number Diff line
@@ -734,10 +734,7 @@ static inline int apic_find_highest_irr(struct kvm_lapic *apic) 
static inline void apic_clear_irr(int vec, struct kvm_lapic *apic)

{

	if (unlikely(apic->apicv_active)) {

		/* need to update RVI */

		kvm_lapic_clear_vector(vec, apic->regs + APIC_IRR);

		kvm_x86_call(hwapic_irr_update)(apic->vcpu,

						apic_find_highest_irr(apic));

	} else {

		apic->irr_pending = false;

		kvm_lapic_clear_vector(vec, apic->regs + APIC_IRR);
@@ -763,7 +760,7 @@ static inline void apic_set_isr(int vec, struct kvm_lapic *apic) 
	 * just set SVI.

	 */

	if (unlikely(apic->apicv_active))

		kvm_x86_call(hwapic_isr_update)(vec);

		kvm_x86_call(hwapic_isr_update)(apic->vcpu, vec);

	else {

		++apic->isr_count;

		BUG_ON(apic->isr_count > MAX_APIC_VECTOR);
@@ -808,7 +805,7 @@ static inline void apic_clear_isr(int vec, struct kvm_lapic *apic) 
	 * and must be left alone.

	 */

	if (unlikely(apic->apicv_active))

		kvm_x86_call(hwapic_isr_update)(apic_find_highest_isr(apic));

		kvm_x86_call(hwapic_isr_update)(apic->vcpu, apic_find_highest_isr(apic));

	else {

		--apic->isr_count;

		BUG_ON(apic->isr_count < 0);
@@ -816,6 +813,17 @@ static inline void apic_clear_isr(int vec, struct kvm_lapic *apic) 
	}

}



void kvm_apic_update_hwapic_isr(struct kvm_vcpu *vcpu)

{

	struct kvm_lapic *apic = vcpu->arch.apic;



	if (WARN_ON_ONCE(!lapic_in_kernel(vcpu)) || !apic->apicv_active)

		return;



	kvm_x86_call(hwapic_isr_update)(vcpu, apic_find_highest_isr(apic));

}

EXPORT_SYMBOL_GPL(kvm_apic_update_hwapic_isr);



int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu)

{

	/* This may race with setting of irr in __apic_accept_irq() and
@@ -2805,8 +2813,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event) 
	apic_update_ppr(apic);

	if (apic->apicv_active) {

		kvm_x86_call(apicv_post_state_restore)(vcpu);

		kvm_x86_call(hwapic_irr_update)(vcpu, -1);

		kvm_x86_call(hwapic_isr_update)(-1);

		kvm_x86_call(hwapic_isr_update)(vcpu, -1);

	}



	vcpu->arch.apic_arb_prio = 0;
@@ -3121,9 +3128,7 @@ int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s) 
	kvm_apic_update_apicv(vcpu);

	if (apic->apicv_active) {

		kvm_x86_call(apicv_post_state_restore)(vcpu);

		kvm_x86_call(hwapic_irr_update)(vcpu,

						apic_find_highest_irr(apic));

		kvm_x86_call(hwapic_isr_update)(apic_find_highest_isr(apic));

		kvm_x86_call(hwapic_isr_update)(vcpu, apic_find_highest_isr(apic));

	}

	kvm_make_request(KVM_REQ_EVENT, vcpu);

	if (ioapic_in_kernel(vcpu->kvm))

arch/x86/kvm/lapic.h

+1 −0
Original line number Diff line number Diff line
@@ -118,6 +118,7 @@ void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high); 
int kvm_apic_set_base(struct kvm_vcpu *vcpu, u64 value, bool host_initiated);

int kvm_apic_get_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);

int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);

void kvm_apic_update_hwapic_isr(struct kvm_vcpu *vcpu);

int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);



u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);

arch/x86/kvm/vmx/main.c

+1 −2
Original line number Diff line number Diff line
@@ -100,7 +100,6 @@ struct kvm_x86_ops vt_x86_ops __initdata = { 
	.load_eoi_exitmap = vmx_load_eoi_exitmap,

	.apicv_pre_state_restore = vmx_apicv_pre_state_restore,

	.required_apicv_inhibits = VMX_REQUIRED_APICV_INHIBITS,

	.hwapic_irr_update = vmx_hwapic_irr_update,

	.hwapic_isr_update = vmx_hwapic_isr_update,

	.sync_pir_to_irr = vmx_sync_pir_to_irr,

	.deliver_interrupt = vmx_deliver_interrupt,
@@ -126,7 +125,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = { 
	.check_intercept = vmx_check_intercept,

	.handle_exit_irqoff = vmx_handle_exit_irqoff,



	.cpu_dirty_log_size = PML_ENTITY_NUM,

	.cpu_dirty_log_size = PML_LOG_NR_ENTRIES,

	.update_cpu_dirty_logging = vmx_update_cpu_dirty_logging,



	.nested_ops = &vmx_nested_ops,