Commit 893ace4d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pwrseq-updates-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull power sequencing updates from Bartosz Golaszewski:
 "One new driver and support for more models added to the existing
  qcom-wcn driver as well as some minor tweaks and fixes.

  New drivers:
   - add the power sequencing driver for PCIe M.2 connectors

  Driver improvements:
   - use device_get_match_data() where applicable
   - add support for the WCN39xx family of models to pwrseq-qcom-wcn

  Fixes:
   - fix a locking issue in pwrseq core
   - fix retval check in pwrseq-qcom-wcn"

* tag 'pwrseq-updates-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
  power: sequencing: qcom-wcn: fix error path for VDDIO handling
  power: sequencing: fix missing state_lock in pwrseq_power_on() error path
  power: sequencing: Add the Power Sequencing driver for the PCIe M.2 connectors
  dt-bindings: connector: Add PCIe M.2 Mechanical Key M connector
  power: sequencing: qcom-wcn: add support for WCN39xx
  regulator: dt-bindings: qcom,wcn3990-pmu: describe PMUs on WCN39xx
  power: sequencing: qcom-wcn: use device_get_match_data()
parents c371f62d ecfcae78
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/connector/pcie-m2-m-connector.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: PCIe M.2 Mechanical Key M Connector

maintainers:
  - Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>

description:
  A PCIe M.2 M connector node represents a physical PCIe M.2 Mechanical Key M
  connector. The Mechanical Key M connectors are used to connect SSDs to the
  host system over PCIe/SATA interfaces. These connectors also offer optional
  interfaces like USB, SMBus.

properties:
  compatible:
    const: pcie-m2-m-connector

  vpcie3v3-supply:
    description: A phandle to the regulator for 3.3v supply.

  vpcie1v8-supply:
    description: A phandle to the regulator for VIO 1.8v supply.

  ports:
    $ref: /schemas/graph.yaml#/properties/ports
    description: OF graph bindings modeling the interfaces exposed on the
      connector. Since a single connector can have multiple interfaces, every
      interface has an assigned OF graph port number as described below.

    properties:
      port@0:
        $ref: /schemas/graph.yaml#/properties/port
        description: PCIe interface

      port@1:
        $ref: /schemas/graph.yaml#/properties/port
        description: SATA interface

      port@2:
        $ref: /schemas/graph.yaml#/properties/port
        description: USB 2.0 interface

    anyOf:
      - required:
          - port@0
      - required:
          - port@1

  i2c-parent:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: I2C interface

  clocks:
    description: 32.768 KHz Suspend Clock (SUSCLK) input from the host system to
      the M.2 card. Refer, PCI Express M.2 Specification r4.0, sec 3.1.12.1 for
      more details.
    maxItems: 1

  pedet-gpios:
    description: GPIO input to PEDET signal. This signal is used by the host
      systems to determine the communication protocol that the M.2 card uses;
      SATA signaling (low) or PCIe signaling (high). Refer, PCI Express M.2
      Specification r4.0, sec 3.3.4.2 for more details.
    maxItems: 1

  viocfg-gpios:
    description: GPIO input to IO voltage configuration (VIO_CFG) signal. This
      signal is used by the host systems to determine whether the card supports
      an independent IO voltage domain for the sideband signals or not. Refer,
      PCI Express M.2 Specification r4.0, sec 3.1.15.1 for more details.
    maxItems: 1

  pwrdis-gpios:
    description: GPIO output to Power Disable (PWRDIS) signal. This signal is
      used by the host system to disable power on the M.2 card. Refer, PCI
      Express M.2 Specification r4.0, sec 3.3.5.2 for more details.
    maxItems: 1

  pln-gpios:
    description: GPIO output to Power Loss Notification (PLN#) signal. This
      signal is used by the host system to notify the M.2 card that the power
      loss event is about to occur. Refer, PCI Express M.2 Specification r4.0,
      sec 3.2.17.1 for more details.
    maxItems: 1

  plas3-gpios:
    description: GPIO input to Power Loss Acknowledge (PLA_S3#) signal. This
      signal is used by the host system to receive the acknowledgment of the M.2
      card's preparation for power loss.
    maxItems: 1

required:
  - compatible
  - vpcie3v3-supply

additionalProperties: false

examples:
  # PCI M.2 Key M connector for SSDs with PCIe interface
  - |
    #include <dt-bindings/gpio/gpio.h>

    connector {
        compatible = "pcie-m2-m-connector";
        vpcie3v3-supply = <&vreg_nvme>;
        i2c-parent = <&i2c0>;
        pedet-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
        viocfg-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
        pwrdis-gpios = <&tlmm 97 GPIO_ACTIVE_HIGH>;
        pln-gpios = <&tlmm 98 GPIO_ACTIVE_LOW>;
        plas3-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                #address-cells = <1>;
                #size-cells = <0>;

                reg = <0>;

                endpoint@0 {
                    reg = <0>;
                    remote-endpoint = <&pcie6_port0_ep>;
                };
            };

            port@2 {
                #address-cells = <1>;
                #size-cells = <0>;

                reg = <2>;

                endpoint@0 {
                    reg = <0>;
                    remote-endpoint = <&usb_hs_ep>;
                };
            };
        };
    };
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/regulator/qcom,wcn3990-pmu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Technologies, Inc. WCN3990 PMU Regulators

maintainers:
  - Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>

description:
  The WCN3990 package contains discrete modules for WLAN and Bluetooth. They
  are powered by the Power Management Unit (PMU) that takes inputs from the
  host and provides LDO outputs. This document describes this module.

properties:
  compatible:
    enum:
      - qcom,wcn3950-pmu
      - qcom,wcn3988-pmu
      - qcom,wcn3990-pmu
      - qcom,wcn3991-pmu
      - qcom,wcn3998-pmu

  vddio-supply:
    description: VDD_IO supply regulator handle

  vddxo-supply:
    description: VDD_XTAL supply regulator handle

  vddrf-supply:
    description: VDD_RF supply regulator handle

  vddch0-supply:
    description: chain 0 supply regulator handle

  vddch1-supply:
    description: chain 1 supply regulator handle

  swctrl-gpios:
    maxItems: 1
    description: GPIO line indicating the state of the clock supply to the BT module

  clocks:
    maxItems: 1
    description: Reference clock handle

  regulators:
    type: object
    description:
      LDO outputs of the PMU

    patternProperties:
      "^ldo[0-9]$":
        $ref: regulator.yaml#
        type: object
        unevaluatedProperties: false

    additionalProperties: false

required:
  - compatible
  - regulators
  - vddio-supply
  - vddxo-supply
  - vddrf-supply
  - vddch0-supply

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>
    pmu {
        compatible = "qcom,wcn3990-pmu";

        vddio-supply = <&vreg_io>;
        vddxo-supply = <&vreg_xo>;
        vddrf-supply = <&vreg_rf>;
        vddch0-supply = <&vreg_ch0>;

        regulators {
            vreg_pmu_io: ldo0 {
                regulator-name = "vreg_pmu_io";
            };

            vreg_pmu_xo: ldo1 {
                regulator-name = "vreg_pmu_xo";
            };

            vreg_pmu_rf: ldo2 {
                regulator-name = "vreg_pmu_rf";
            };

            vreg_pmu_ch0: ldo3 {
                regulator-name = "vreg_pmu_ch0";
            };
        };
    };
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@@ -20861,6 +20861,13 @@ F: Documentation/driver-api/pwrseq.rst
F:	drivers/power/sequencing/
F:	include/linux/pwrseq/
PCIE M.2 POWER SEQUENCING
M:	Manivannan Sadhasivam <mani@kernel.org>
L:	linux-pci@vger.kernel.org
S:	Maintained
F:	Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml
F:	drivers/power/sequencing/pwrseq-pcie-m2.c
POWER STATE COORDINATION INTERFACE (PSCI)
M:	Mark Rutland <mark.rutland@arm.com>
M:	Lorenzo Pieralisi <lpieralisi@kernel.org>
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@@ -35,4 +35,12 @@ config POWER_SEQUENCING_TH1520_GPU
	  GPU. This driver handles the complex clock and reset sequence
	  required to power on the Imagination BXM GPU on this platform.

config POWER_SEQUENCING_PCIE_M2
	tristate "PCIe M.2 connector power sequencing driver"
	depends on OF || COMPILE_TEST
	help
	  Say Y here to enable the power sequencing driver for PCIe M.2
	  connectors. This driver handles the power sequencing for the M.2
	  connectors exposing multiple interfaces like PCIe, SATA, UART, etc...

endif
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@@ -5,3 +5,4 @@ pwrseq-core-y := core.o

obj-$(CONFIG_POWER_SEQUENCING_QCOM_WCN)	+= pwrseq-qcom-wcn.o
obj-$(CONFIG_POWER_SEQUENCING_TH1520_GPU) += pwrseq-thead-gpu.o
obj-$(CONFIG_POWER_SEQUENCING_PCIE_M2)	+= pwrseq-pcie-m2.o
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