Commit 89ea5be1 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

Merge branch irq/aic-v2 into irq/irqchip-next 



* irq/aic-v2:
  : .
  : Add support for the interrupt controller found is the latest
  : incarnation of Apple M1 systems, courtesy of Hector Martin.
  : .
  irqchip/apple-aic: Add support for AICv2
  irqchip/apple-aic: Support multiple dies
  irqchip/apple-aic: Dynamically compute register offsets
  irqchip/apple-aic: Switch to irq_domain_create_tree and sparse hwirqs
  irqchip/apple-aic: Add Fast IPI support
  dt-bindings: interrupt-controller: apple,aic2: New binding for AICv2
  PCI: apple: Change MSI handling to handle 4-cell AIC fwspec form

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parents c425060a 768d4435

Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Apple Interrupt Controller 2



maintainers:

  - Hector Martin <marcan@marcan.st>



description: |

  The Apple Interrupt Controller 2 is a simple interrupt controller present on

  Apple ARM SoC platforms starting with t600x (M1 Pro and Max).



  It provides the following features:



  - Level-triggered hardware IRQs wired to SoC blocks

    - Single mask bit per IRQ

    - Automatic masking on event delivery (auto-ack)

    - Software triggering (ORed with hw line)

  - Automatic prioritization (single event/ack register per CPU, lower IRQs =

    higher priority)

  - Automatic masking on ack

  - Support for multiple dies



  This device also represents the FIQ interrupt sources on platforms using AIC,

  which do not go through a discrete interrupt controller. It also handles

  FIQ-based Fast IPIs.



properties:

  compatible:

    items:

      - const: apple,t6000-aic

      - const: apple,aic2



  interrupt-controller: true



  '#interrupt-cells':

    const: 4

    description: |

      The 1st cell contains the interrupt type:

        - 0: Hardware IRQ

        - 1: FIQ



      The 2nd cell contains the die ID.



      The next cell contains the interrupt number.

        - HW IRQs: interrupt number

        - FIQs:

          - 0: physical HV timer

          - 1: virtual HV timer

          - 2: physical guest timer

          - 3: virtual guest timer



      The last cell contains the interrupt flags. This is normally

      IRQ_TYPE_LEVEL_HIGH (4).



  reg:

    items:

      - description: Address and size of the main AIC2 registers.

      - description: Address and size of the AIC2 Event register.



  reg-names:

    items:

      - const: core

      - const: event



  power-domains:

    maxItems: 1



required:

  - compatible

  - '#interrupt-cells'

  - interrupt-controller

  - reg

  - reg-names



additionalProperties: false



allOf:

  - $ref: /schemas/interrupt-controller.yaml#



examples:

  - |

    soc {

        #address-cells = <2>;

        #size-cells = <2>;



        aic: interrupt-controller@28e100000 {

            compatible = "apple,t6000-aic", "apple,aic2";

            #interrupt-cells = <4>;

            interrupt-controller;

            reg = <0x2 0x8e100000 0x0 0xc000>,

                  <0x2 0x8e10c000 0x0 0x4>;

            reg-names = "core", "event";

        };

    };

MAINTAINERS

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@@ -1767,7 +1767,7 @@ T: git https://github.com/AsahiLinux/linux.git 
F:	Documentation/devicetree/bindings/arm/apple.yaml

F:	Documentation/devicetree/bindings/arm/apple/*

F:	Documentation/devicetree/bindings/i2c/apple,i2c.yaml

F:	Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml

F:	Documentation/devicetree/bindings/interrupt-controller/apple,*

F:	Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml

F:	Documentation/devicetree/bindings/pci/apple,pcie.yaml

F:	Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml

drivers/irqchip/irq-apple-aic.c

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File changed.

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drivers/pci/controller/pcie-apple.c

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@@ -219,7 +219,7 @@ static int apple_msi_domain_alloc(struct irq_domain *domain, unsigned int virq, 
	if (hwirq < 0)

		return -ENOSPC;



	fwspec.param[1] += hwirq;

	fwspec.param[fwspec.param_count - 2] += hwirq;



	ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &fwspec);

	if (ret)