Commit 8b120707 authored by Cosmin Tanislav's avatar Cosmin Tanislav Committed by Geert Uytterhoeven
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dt-bindings: pinctrl: renesas,r9a09g077-pinctrl: Document GPIO IRQ



The Renesas RZ/T2H (R9A09G077) and Renesas RZ/N2H (R9A09G087) SoCs have
IRQ-capable pins handled by the ICU, which forwards them to the GIC.

The ICU supports 16 IRQ lines, the pins map to these lines arbitrarily,
and the mapping is not configurable.

Document the required properties to handle GPIO IRQ.

Signed-off-by: default avatarCosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Reviewed-by: default avatarLinus Walleij <linusw@kernel.org>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251205150234.2958140-4-cosmin-gabriel.tanislav.xa@renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 49b039a6
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Original line number Diff line number Diff line
@@ -49,6 +49,17 @@ properties:
  gpio-ranges:
    maxItems: 1

  interrupt-controller: true

  '#interrupt-cells':
    const: 2
    description:
      The first cell contains the global GPIO port index, constructed using the
      RZT2H_GPIO() helper macro from <dt-bindings/pinctrl/renesas,r9a09g077-pinctrl.h>
      and the second cell is used to specify the flag.
      E.g. "interrupts = <RZT2H_GPIO(8, 6) IRQ_TYPE_EDGE_FALLING>;" if P08_6 is
      being used as an interrupt.

  clocks:
    maxItems: 1

@@ -139,6 +150,8 @@ examples:
        gpio-controller;
        #gpio-cells = <2>;
        gpio-ranges = <&pinctrl 0 0 288>;
        interrupt-controller;
        #interrupt-cells = <2>;
        power-domains = <&cpg>;

        serial0-pins {