Commit 8b2429a1 authored by Jiadong Zhu's avatar Jiadong Zhu Committed by Alex Deucher
Browse files

drm/amdgpu/mes: modify mes api for mmio queue reset 



Add me/pipe/queue parameters for queue reset input.

v2: fix build (Alex)

Acked-by: default avatarVitaly Prosyak <vitaly.prosyak@amd.com>
Signed-off-by: default avatarJiadong Zhu <Jiadong.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8fe4fde3

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

+2 −1
Original line number Diff line number Diff line
@@ -873,7 +873,8 @@ int amdgpu_mes_unmap_legacy_queue(struct amdgpu_device *adev, 


int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,

				  struct amdgpu_ring *ring,

				  unsigned int vmid)

				  unsigned int vmid,

				  bool use_mmio)

{

	struct mes_reset_legacy_queue_input queue_input;

	int r;

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h

+13 −1
Original line number Diff line number Diff line
@@ -252,6 +252,13 @@ struct mes_remove_queue_input { 
struct mes_reset_queue_input {

	uint32_t	doorbell_offset;

	uint64_t	gang_context_addr;

	bool		use_mmio;

	uint32_t	queue_type;

	uint32_t	me_id;

	uint32_t	pipe_id;

	uint32_t	queue_id;

	uint32_t	xcc_id;

	uint32_t	vmid;

};



struct mes_map_legacy_queue_input {
@@ -288,6 +295,8 @@ struct mes_resume_gang_input { 
struct mes_reset_legacy_queue_input {

	uint32_t                           queue_type;

	uint32_t                           doorbell_offset;

	bool                               use_mmio;

	uint32_t                           me_id;

	uint32_t                           pipe_id;

	uint32_t                           queue_id;

	uint64_t                           mqd_addr;
@@ -397,6 +406,8 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id, 
			    int *queue_id);

int amdgpu_mes_remove_hw_queue(struct amdgpu_device *adev, int queue_id);

int amdgpu_mes_reset_hw_queue(struct amdgpu_device *adev, int queue_id);

int amdgpu_mes_reset_hw_queue_mmio(struct amdgpu_device *adev, int queue_type,

				   int me_id, int pipe_id, int queue_id, int vmid);



int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,

				struct amdgpu_ring *ring);
@@ -406,7 +417,8 @@ int amdgpu_mes_unmap_legacy_queue(struct amdgpu_device *adev, 
				  u64 gpu_addr, u64 seq);

int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,

				  struct amdgpu_ring *ring,

				  unsigned int vmid);

				  unsigned int vmid,

				  bool use_mmio);



uint32_t amdgpu_mes_rreg(struct amdgpu_device *adev, uint32_t reg);

int amdgpu_mes_wreg(struct amdgpu_device *adev,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

+1 −1
Original line number Diff line number Diff line
@@ -6549,7 +6549,7 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid) 
	struct amdgpu_device *adev = ring->adev;

	int r;



	r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid);

	r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);

	if (r)

		return r;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

+1 −1
Original line number Diff line number Diff line
@@ -5163,7 +5163,7 @@ static int gfx_v12_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid) 
	struct amdgpu_device *adev = ring->adev;

	int r;



	r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid);

	r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);

	if (r) {

		dev_err(adev->dev, "reset via MES failed %d\n", r);

		return r;