Commit 8bb42ed4 authored by Moshe Shemesh's avatar Moshe Shemesh Committed by Saeed Mahameed
Browse files

net/mlx5: Expose timeout for sync reset unload stage 



Expose new timoueout in Default Timeouts Register to be used on sync
reset flow running on smart NIC. In this flow the driver should know how
much time to wait from getting unload request till firmware will ask the
PF to continue to next stage of the flow.

Signed-off-by: default avatarMoshe Shemesh <moshe@nvidia.com>
Reviewed-by: default avatarShay Drory <shayd@nvidia.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
parent 92501fa6

drivers/net/ethernet/mellanox/mlx5/core/lib/tout.c

+3 −1
Original line number Diff line number Diff line
@@ -24,7 +24,8 @@ static const u32 tout_def_sw_val[MAX_TIMEOUT_TYPES] = { 
	[MLX5_TO_TEARDOWN_MS] = 3000,

	[MLX5_TO_FSM_REACTIVATE_MS] = 5000,

	[MLX5_TO_RECLAIM_PAGES_MS] = 5000,

	[MLX5_TO_RECLAIM_VFS_PAGES_MS] = 120000

	[MLX5_TO_RECLAIM_VFS_PAGES_MS] = 120000,

	[MLX5_TO_RESET_UNLOAD_MS] = 300000

};



static void tout_set(struct mlx5_core_dev *dev, u64 val, enum mlx5_timeouts_types type)
@@ -146,6 +147,7 @@ static int tout_query_dtor(struct mlx5_core_dev *dev) 
	MLX5_TIMEOUT_FILL(fsm_reactivate_to, out, dev, MLX5_TO_FSM_REACTIVATE_MS, 0);

	MLX5_TIMEOUT_FILL(reclaim_pages_to, out, dev, MLX5_TO_RECLAIM_PAGES_MS, 0);

	MLX5_TIMEOUT_FILL(reclaim_vfs_pages_to, out, dev, MLX5_TO_RECLAIM_VFS_PAGES_MS, 0);

	MLX5_TIMEOUT_FILL(reset_unload_to, out, dev, MLX5_TO_RESET_UNLOAD_MS, 0);



	return 0;

}

drivers/net/ethernet/mellanox/mlx5/core/lib/tout.h

+1 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ enum mlx5_timeouts_types { 
	MLX5_TO_FSM_REACTIVATE_MS,

	MLX5_TO_RECLAIM_PAGES_MS,

	MLX5_TO_RECLAIM_VFS_PAGES_MS,

	MLX5_TO_RESET_UNLOAD_MS,



	MAX_TIMEOUT_TYPES

};

include/linux/mlx5/mlx5_ifc.h

+3 −1
Original line number Diff line number Diff line
@@ -3117,7 +3117,9 @@ struct mlx5_ifc_dtor_reg_bits { 


	struct mlx5_ifc_default_timeout_bits reclaim_vfs_pages_to;



	u8         reserved_at_1c0[0x40];

	struct mlx5_ifc_default_timeout_bits reset_unload_to;



	u8         reserved_at_1c0[0x20];

};



enum {