Commit 8bd1254c authored by Vivek Pernamitta's avatar Vivek Pernamitta Committed by Manivannan Sadhasivam
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bus: mhi: host: pci_generic: Enable IP_SW and IP_ETH channels for Qcom QDU100 device 



Enable IP_SW1 (ch:48/49), IP_ETH0 (ch:50,51) and IP_ETH1 (ch:52,
53) channels over MHI for M-plane, NETCONF and S-plane interface
for Qualcomm 5G DU X100 Accelerator Card (QDU100).

M-plane:
Used to implement DU M-Plane software for non-real-time O-RAN management
between O-DU and O-RU using NETCONF/YANG and O-RAN WG4 M-Plane YANG models.
It provides capability exchange, configuration management, performance
monitoring, and fault management per O-RAN.WG4.TS.MP.0-R004-v18.00 spec.

Netconf:
Used for configuration operations such as fetching, modifying, and deleting
network device configurations.

This interface is also used for IETF Netconf communication, with a Netconf
server on the ORU to interact with a Netconf client running on the host.

S-plane:
To support frequency and time synchronization between O-DUs and O-RUs using
Synchronous Ethernet and IEEE 1588. Assume PTP transport over L2 Ethernet
(ITU-T G.8275.1) for full timing support and to allow PTP over UDP/IP
(ITU-T G.8275.2) with reduced reliability, as per ORAN spec
O-RAN.WG4.CUS.0-R003-v12.00.

Signed-off-by: default avatarVivek Pernamitta <vivek.pernamitta@oss.qualcomm.com>
[mani: commit log]
Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https://patch.msgid.link/20260212-eth_vdev_next-20260211-v8-2-0974b3a8d61b@qti.qualcomm.com
parent 6a708410

drivers/bus/mhi/host/pci_generic.c

+8 −0
Original line number Diff line number Diff line
@@ -253,6 +253,13 @@ static const struct mhi_channel_config mhi_qcom_qdu100_channels[] = { 
	MHI_CHANNEL_CONFIG_DL(41, "MHI_PHC", 32, 4),

	MHI_CHANNEL_CONFIG_UL(46, "IP_SW0", 256, 5),

	MHI_CHANNEL_CONFIG_DL(47, "IP_SW0", 256, 5),

	MHI_CHANNEL_CONFIG_UL(48, "IP_SW1", 256, 6),

	MHI_CHANNEL_CONFIG_DL(49, "IP_SW1", 256, 6),

	MHI_CHANNEL_CONFIG_UL(50, "IP_ETH0", 256, 7),

	MHI_CHANNEL_CONFIG_DL(51, "IP_ETH0", 256, 7),

	MHI_CHANNEL_CONFIG_UL(52, "IP_ETH1", 256, 8),

	MHI_CHANNEL_CONFIG_DL(53, "IP_ETH1", 256, 8),



};



static struct mhi_event_config mhi_qcom_qdu100_events[] = {
@@ -268,6 +275,7 @@ static struct mhi_event_config mhi_qcom_qdu100_events[] = { 
	MHI_EVENT_CONFIG_SW_DATA(5, 512),

	MHI_EVENT_CONFIG_SW_DATA(6, 512),

	MHI_EVENT_CONFIG_SW_DATA(7, 512),

	MHI_EVENT_CONFIG_SW_DATA(8, 512),

};



static const struct mhi_controller_config mhi_qcom_qdu100_config = {