Commit 8c4d0172 authored by Michael Klein's avatar Michael Klein Committed by Paolo Abeni
Browse files

net: phy: realtek: Group RTL82* macro definitions 



Group macro definitions by PHY in lexicographic order. Within each PHY
block, definitions are order by page number and then register number.

Signed-off-by: default avatarMichael Klein <michael@fossekall.de>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20250504172916.243185-5-michael@fossekall.de


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 12d40df2

drivers/net/phy/realtek/realtek_main.c

+37 −35
Original line number Diff line number Diff line
@@ -18,6 +18,16 @@ 


#include "realtek.h"



#define RTL8201F_IER				0x13



#define RTL8201F_ISR				0x1e

#define RTL8201F_ISR_ANERR			BIT(15)

#define RTL8201F_ISR_DUPLEX			BIT(13)

#define RTL8201F_ISR_LINK			BIT(11)

#define RTL8201F_ISR_MASK			(RTL8201F_ISR_ANERR | \

						 RTL8201F_ISR_DUPLEX | \

						 RTL8201F_ISR_LINK)



#define RTL821x_INER				0x12

#define RTL8211B_INER_INIT			0x6400

#define RTL8211E_INER_LINK_STATUS		BIT(10)
@@ -30,9 +40,21 @@ 
#define RTL821x_PAGE_SELECT			0x1f

#define RTL821x_SET_EXT_PAGE			0x07



/* RTL8211E extension page 164/0xa4 */

#define RTL8211E_RGMII_EXT_PAGE			0xa4

#define RTL8211E_RGMII_DELAY			0x1c

#define RTL8211E_CTRL_DELAY			BIT(13)

#define RTL8211E_TX_DELAY			BIT(12)

#define RTL8211E_RX_DELAY			BIT(11)

#define RTL8211E_DELAY_MASK			GENMASK(13, 11)



/* RTL8211F PHY configuration */

#define RTL8211F_PHYCR_PAGE			0xa43

#define RTL8211F_PHYCR1				0x18

#define RTL8211F_ALDPS_PLL_OFF			BIT(1)

#define RTL8211F_ALDPS_ENABLE			BIT(2)

#define RTL8211F_ALDPS_XTAL_OFF			BIT(12)



#define RTL8211F_PHYCR2				0x19

#define RTL8211F_CLKOUT_EN			BIT(0)

#define RTL8211F_PHYCR2_PHY_EEE_ENABLE		BIT(5)
@@ -40,24 +62,6 @@ 
#define RTL8211F_INSR_PAGE			0xa43

#define RTL8211F_INSR				0x1d



/* RTL8211F WOL interrupt configuration */

#define RTL8211F_INTBCR_PAGE			0xd40

#define RTL8211F_INTBCR				0x16

#define RTL8211F_INTBCR_INTB_PMEB		BIT(5)



/* RTL8211F WOL settings */

#define RTL8211F_WOL_SETTINGS_PAGE		0xd8a

#define RTL8211F_WOL_SETTINGS_EVENTS		16

#define RTL8211F_WOL_EVENT_MAGIC		BIT(12)

#define RTL8211F_WOL_SETTINGS_STATUS		17

#define RTL8211F_WOL_STATUS_RESET		(BIT(15) | 0x1fff)



/* RTL8211F Unique phyiscal and multicast address (WOL) */

#define RTL8211F_PHYSICAL_ADDR_PAGE		0xd8c

#define RTL8211F_PHYSICAL_ADDR_WORD0		16

#define RTL8211F_PHYSICAL_ADDR_WORD1		17

#define RTL8211F_PHYSICAL_ADDR_WORD2		18



/* RTL8211F LED configuration */

#define RTL8211F_LEDCR_PAGE			0xd04

#define RTL8211F_LEDCR				0x10
@@ -78,25 +82,23 @@ 
#define RTL8211F_RXCR				0x15

#define RTL8211F_RX_DELAY			BIT(3)



#define RTL8211F_ALDPS_PLL_OFF			BIT(1)

#define RTL8211F_ALDPS_ENABLE			BIT(2)

#define RTL8211F_ALDPS_XTAL_OFF			BIT(12)

/* RTL8211F WOL interrupt configuration */

#define RTL8211F_INTBCR_PAGE			0xd40

#define RTL8211F_INTBCR				0x16

#define RTL8211F_INTBCR_INTB_PMEB		BIT(5)



#define RTL8211E_RGMII_EXT_PAGE			0xa4

#define RTL8211E_RGMII_DELAY			0x1c

#define RTL8211E_CTRL_DELAY			BIT(13)

#define RTL8211E_TX_DELAY			BIT(12)

#define RTL8211E_RX_DELAY			BIT(11)

#define RTL8211E_DELAY_MASK			GENMASK(13, 11)

/* RTL8211F WOL settings */

#define RTL8211F_WOL_SETTINGS_PAGE		0xd8a

#define RTL8211F_WOL_SETTINGS_EVENTS		16

#define RTL8211F_WOL_EVENT_MAGIC		BIT(12)

#define RTL8211F_WOL_SETTINGS_STATUS		17

#define RTL8211F_WOL_STATUS_RESET		(BIT(15) | 0x1fff)



#define RTL8201F_ISR				0x1e

#define RTL8201F_ISR_ANERR			BIT(15)

#define RTL8201F_ISR_DUPLEX			BIT(13)

#define RTL8201F_ISR_LINK			BIT(11)

#define RTL8201F_ISR_MASK			(RTL8201F_ISR_ANERR | \

						 RTL8201F_ISR_DUPLEX | \

						 RTL8201F_ISR_LINK)

#define RTL8201F_IER				0x13

/* RTL8211F Unique phyiscal and multicast address (WOL) */

#define RTL8211F_PHYSICAL_ADDR_PAGE		0xd8c

#define RTL8211F_PHYSICAL_ADDR_WORD0		16

#define RTL8211F_PHYSICAL_ADDR_WORD1		17

#define RTL8211F_PHYSICAL_ADDR_WORD2		18



#define RTL822X_VND1_SERDES_OPTION			0x697a

#define RTL822X_VND1_SERDES_OPTION_MODE_MASK		GENMASK(5, 0)