Commit 8c50bf9b authored by Lijo Lazar's avatar Lijo Lazar Committed by Alex Deucher
Browse files

drm/amdgpu: Fix JPEG v4.0.3 register write



EXTERNAL_REG_INTERNAL_OFFSET/EXTERNAL_REG_WRITE_ADDR should be used in
pairs. If an external register shouldn't be written, both packets
shouldn't be sent.

Fixes: a78b4814 ("drm/amdgpu: Skip PCTL0_MMHUB_DEEPSLEEP_IB write in jpegv4.0.3 under SRIOV")
Signed-off-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Acked-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 631c54f1
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+10 −8
Original line number Diff line number Diff line
@@ -674,12 +674,13 @@ void jpeg_v4_0_3_dec_ring_insert_start(struct amdgpu_ring *ring)
		amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
			0, 0, PACKETJ_TYPE0));
		amdgpu_ring_write(ring, 0x62a04); /* PCTL0_MMHUB_DEEPSLEEP_IB */
	}

	amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,
		0, 0, PACKETJ_TYPE0));
		amdgpu_ring_write(ring,
				  PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, 0,
					  0, PACKETJ_TYPE0));
		amdgpu_ring_write(ring, 0x80004000);
	}
}

/**
 * jpeg_v4_0_3_dec_ring_insert_end - insert a end command
@@ -694,12 +695,13 @@ void jpeg_v4_0_3_dec_ring_insert_end(struct amdgpu_ring *ring)
		amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
			0, 0, PACKETJ_TYPE0));
		amdgpu_ring_write(ring, 0x62a04);
	}

	amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,
		0, 0, PACKETJ_TYPE0));
		amdgpu_ring_write(ring,
				  PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, 0,
					  0, PACKETJ_TYPE0));
		amdgpu_ring_write(ring, 0x00004000);
	}
}

/**
 * jpeg_v4_0_3_dec_ring_emit_fence - emit an fence & trap command