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Add the aliased address of extended linear cache when emitting event trace for poison, DRAM and general media of CXL events. Reviewed-by:Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by:
Li Ming <ming.li@zohomail.com> Reviewed-by:
Alison Schofield <alison.schofield@intel.com> Link: https://patch.msgid.link/20250226162224.3633792-4-dave.jiang@intel.com Signed-off-by:
Dave Jiang <dave.jiang@intel.com>