Commit 8c68b565 authored by Ben Chuang's avatar Ben Chuang Committed by Ulf Hansson
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mmc: sdhci-pci-gli: GL9767: Fix low power mode on the set clock function 



On sdhci_gl9767_set_clock(), the vendor header space(VHS) is read-only
after calling gl9767_disable_ssc_pll() and gl9767_set_ssc_pll_205mhz().
So the low power negotiation mode cannot be enabled again.
Introduce gl9767_set_low_power_negotiation() function to fix it.

The explanation process is as below.

static void sdhci_gl9767_set_clock()
{
	...
        gl9767_vhs_write();
        ...
	value |= PCIE_GLI_9767_CFG_LOW_PWR_OFF;
        pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value); <--- (a)

        gl9767_disable_ssc_pll(); <--- (b)
        sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);

        if (clock == 0)
                return;  <-- (I)

	...
        if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
		...
                gl9767_set_ssc_pll_205mhz(); <--- (c)
        }
	...
	value &= ~PCIE_GLI_9767_CFG_LOW_PWR_OFF;
        pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value); <-- (II)
        gl9767_vhs_read();
}

(a) disable low power negotiation mode. When return on (I), the low power
mode is disabled.  After (b) and (c), VHS is read-only, the low power mode
cannot be enabled on (II).

Reported-by: default avatarGeorg Gottleuber <ggo@tuxedocomputers.com>
Fixes: d2754355 ("mmc: sdhci-pci-gli: Set SDR104's clock to 205MHz and enable SSC for GL9767")
Signed-off-by: default avatarBen Chuang <ben.chuang@genesyslogic.com.tw>
Tested-by: default avatarGeorg Gottleuber <ggo@tuxedocomputers.com>
Cc: stable@vger.kernel.org
Message-ID: <20241025060017.1663697-1-benchuanggli@gmail.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 8e929cb5

drivers/mmc/host/sdhci-pci-gli.c

+21 −14
Original line number Diff line number Diff line
@@ -892,28 +892,40 @@ static void gl9767_disable_ssc_pll(struct pci_dev *pdev) 
	gl9767_vhs_read(pdev);

}



static void gl9767_set_low_power_negotiation(struct pci_dev *pdev, bool enable)

{

	u32 value;



	gl9767_vhs_write(pdev);



	pci_read_config_dword(pdev, PCIE_GLI_9767_CFG, &value);

	if (enable)

		value &= ~PCIE_GLI_9767_CFG_LOW_PWR_OFF;

	else

		value |= PCIE_GLI_9767_CFG_LOW_PWR_OFF;

	pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value);



	gl9767_vhs_read(pdev);

}



static void sdhci_gl9767_set_clock(struct sdhci_host *host, unsigned int clock)

{

	struct sdhci_pci_slot *slot = sdhci_priv(host);

	struct mmc_ios *ios = &host->mmc->ios;

	struct pci_dev *pdev;

	u32 value;

	u16 clk;



	pdev = slot->chip->pdev;

	host->mmc->actual_clock = 0;



	gl9767_vhs_write(pdev);



	pci_read_config_dword(pdev, PCIE_GLI_9767_CFG, &value);

	value |= PCIE_GLI_9767_CFG_LOW_PWR_OFF;

	pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value);



	gl9767_set_low_power_negotiation(pdev, false);

	gl9767_disable_ssc_pll(pdev);

	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);



	if (clock == 0)

	if (clock == 0) {

		gl9767_set_low_power_negotiation(pdev, true);

		return;

	}



	clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

	if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
@@ -922,12 +934,7 @@ static void sdhci_gl9767_set_clock(struct sdhci_host *host, unsigned int clock) 
	}



	sdhci_enable_clk(host, clk);



	pci_read_config_dword(pdev, PCIE_GLI_9767_CFG, &value);

	value &= ~PCIE_GLI_9767_CFG_LOW_PWR_OFF;

	pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value);



	gl9767_vhs_read(pdev);

	gl9767_set_low_power_negotiation(pdev, true);

}



static void gli_set_9767(struct sdhci_host *host)