Commit 8c941f14 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'there-are-some-bugfix-for-hibmcge-driver' 

Jijie Shao says:

====================
There are some bugfix for hibmcge driver

v2: https://lore.kernel.org/20250403135311.545633-7-shaojijie@huawei.com/
v1: https://lore.kernel.org/20250402133905.895421-1-shaojijie@huawei.com/
====================

Link: https://patch.msgid.link/20250410021327.590362-1-shaojijie@huawei.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents f7a11cba e1d0b52d

drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h

+5 −3
Original line number Diff line number Diff line
@@ -108,14 +108,16 @@ struct hbg_irq_info { 
	bool re_enable;

	bool need_print;

	bool need_reset;

	u64 count;



	void (*irq_handle)(struct hbg_priv *priv, struct hbg_irq_info *info);

	void (*irq_handle)(struct hbg_priv *priv,

			   const struct hbg_irq_info *info);

};



struct hbg_vector {

	char name[HBG_VECTOR_NUM][32];

	struct hbg_irq_info *info_array;



	u64 *stats_array;

	const struct hbg_irq_info *info_array;

	u32 info_array_len;

};

drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c

+7 −4
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ static int hbg_dbg_irq_info(struct seq_file *s, void *unused) 
{

	struct net_device *netdev = dev_get_drvdata(s->private);

	struct hbg_priv *priv = netdev_priv(netdev);

	struct hbg_irq_info *info;

	const struct hbg_irq_info *info;

	u32 i;



	for (i = 0; i < priv->vectors.info_array_len; i++) {
@@ -73,7 +73,7 @@ static int hbg_dbg_irq_info(struct seq_file *s, void *unused) 
								info->mask)),

			   str_true_false(info->need_reset),

			   str_true_false(info->need_print),

			   info->count);

			   priv->vectors.stats_array[i]);

	}



	return 0;
@@ -106,6 +106,7 @@ static int hbg_dbg_nic_state(struct seq_file *s, void *unused) 
{

	struct net_device *netdev = dev_get_drvdata(s->private);

	struct hbg_priv *priv = netdev_priv(netdev);

	bool np_link_fail;



	seq_printf(s, "event handling state: %s\n",

		   state_str_true_false(priv, HBG_NIC_STATE_EVENT_HANDLING));
@@ -117,8 +118,10 @@ static int hbg_dbg_nic_state(struct seq_file *s, void *unused) 
		   reset_type_str[priv->reset_type]);

	seq_printf(s, "need reset state: %s\n",

		   state_str_true_false(priv, HBG_NIC_STATE_NEED_RESET));

	seq_printf(s, "np_link fail state: %s\n",

		   state_str_true_false(priv, HBG_NIC_STATE_NP_LINK_FAIL));



	np_link_fail = !hbg_reg_read_field(priv, HBG_REG_AN_NEG_STATE_ADDR,

					   HBG_REG_AN_NEG_STATE_NP_LINK_OK_B);

	seq_printf(s, "np_link fail state: %s\n", str_true_false(np_link_fail));



	return 0;

}

drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c

+1 −1
Original line number Diff line number Diff line
@@ -234,7 +234,7 @@ static u64 hbg_get_irq_stats(struct hbg_vector *vectors, u32 mask) 


	for (i = 0; i < vectors->info_array_len; i++)

		if (vectors->info_array[i].mask == mask)

			return vectors->info_array[i].count;

			return vectors->stats_array[i];



	return 0;

}

drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c

+3 −0
Original line number Diff line number Diff line
@@ -26,12 +26,15 @@ static void hbg_restore_mac_table(struct hbg_priv *priv) 


static void hbg_restore_user_def_settings(struct hbg_priv *priv)

{

	/* The index of host mac is always 0. */

	u64 rx_pause_addr = ether_addr_to_u64(priv->filter.mac_table[0].addr);

	struct ethtool_pauseparam *pause_param = &priv->user_def.pause_param;



	hbg_restore_mac_table(priv);

	hbg_hw_set_mtu(priv, priv->netdev->mtu);

	hbg_hw_set_pause_enable(priv, pause_param->tx_pause,

				pause_param->rx_pause);

	hbg_hw_set_rx_pause_mac_addr(priv, rx_pause_addr);

}



int hbg_rebuild(struct hbg_priv *priv)

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

+7 −0
Original line number Diff line number Diff line
@@ -234,6 +234,10 @@ void hbg_hw_set_mac_filter_enable(struct hbg_priv *priv, u32 enable) 
{

	hbg_reg_write_field(priv, HBG_REG_REC_FILT_CTRL_ADDR,

			    HBG_REG_REC_FILT_CTRL_UC_MATCH_EN_B, enable);



	/* only uc filter is supported, so set all bits of mc mask reg to 1 */

	hbg_reg_write64(priv, HBG_REG_STATION_ADDR_LOW_MSK_0, U64_MAX);

	hbg_reg_write64(priv, HBG_REG_STATION_ADDR_LOW_MSK_1, U64_MAX);

}



void hbg_hw_set_pause_enable(struct hbg_priv *priv, u32 tx_en, u32 rx_en)
@@ -242,6 +246,9 @@ void hbg_hw_set_pause_enable(struct hbg_priv *priv, u32 tx_en, u32 rx_en) 
			    HBG_REG_PAUSE_ENABLE_TX_B, tx_en);

	hbg_reg_write_field(priv, HBG_REG_PAUSE_ENABLE_ADDR,

			    HBG_REG_PAUSE_ENABLE_RX_B, rx_en);



	hbg_reg_write_field(priv, HBG_REG_REC_FILT_CTRL_ADDR,

			    HBG_REG_REC_FILT_CTRL_PAUSE_FRM_PASS_B, rx_en);

}



void hbg_hw_get_pause_enable(struct hbg_priv *priv, u32 *tx_en, u32 *rx_en)