Commit 8cc29564 authored by Ivan Vecera's avatar Ivan Vecera Committed by Jakub Kicinski
Browse files

i40e: Initialize hardware capabilities at single place 



Some i40e_hw.caps bits are set in i40e_set_hw_caps(), some of them
in i40e_init_adminq() and the rest of them in i40e_sw_init().
Consolidate the initialization to single proper place i40e_set_hw_caps().

Signed-off-by: default avatarIvan Vecera <ivecera@redhat.com>
Reviewed-by: default avatarJacob Keller <jacob.e.keller@intel.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
Link: https://lore.kernel.org/r/20231113231047.548659-10-anthony.l.nguyen@intel.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 0e8b9fdd

drivers/net/ethernet/intel/i40e/i40e_adminq.c

+48 −18
Original line number Diff line number Diff line
@@ -522,10 +522,52 @@ static void i40e_set_hw_caps(struct i40e_hw *hw) 
			/* The ability to RX (not drop) 802.1ad frames */

			set_bit(I40E_HW_CAP_802_1AD, hw->caps);

		}

		if ((aq->api_maj_ver == 1 && aq->api_min_ver > 4) ||

		    aq->api_maj_ver > 1) {

			/* Supported in FW API version higher than 1.4 */

			set_bit(I40E_HW_CAP_GENEVE_OFFLOAD, hw->caps);

		}

		if ((aq->fw_maj_ver == 4 && aq->fw_min_ver < 33) ||

		    aq->fw_maj_ver < 4) {

			set_bit(I40E_HW_CAP_RESTART_AUTONEG, hw->caps);

			/* No DCB support  for FW < v4.33 */

			set_bit(I40E_HW_CAP_NO_DCB_SUPPORT, hw->caps);

		}

		if ((aq->fw_maj_ver == 4 && aq->fw_min_ver < 3) ||

		    aq->fw_maj_ver < 4) {

			/* Disable FW LLDP if FW < v4.3 */

			set_bit(I40E_HW_CAP_STOP_FW_LLDP, hw->caps);

		}

		if ((aq->fw_maj_ver == 4 && aq->fw_min_ver >= 40) ||

		    aq->fw_maj_ver >= 5) {

			/* Use the FW Set LLDP MIB API if FW > v4.40 */

			set_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, hw->caps);

		}

		if (aq->fw_maj_ver >= 6) {

			/* Enable PTP L4 if FW > v6.0 */

			set_bit(I40E_HW_CAP_PTP_L4, hw->caps);

		}

		break;

	case I40E_MAC_X722:

		set_bit(I40E_HW_CAP_AQ_SRCTL_ACCESS_ENABLE, hw->caps);

		set_bit(I40E_HW_CAP_NVM_READ_REQUIRES_LOCK, hw->caps);

		set_bit(I40E_HW_CAP_RSS_AQ, hw->caps);

		set_bit(I40E_HW_CAP_128_QP_RSS, hw->caps);

		set_bit(I40E_HW_CAP_ATR_EVICT, hw->caps);

		set_bit(I40E_HW_CAP_WB_ON_ITR, hw->caps);

		set_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE, hw->caps);

		set_bit(I40E_HW_CAP_NO_PCI_LINK_CHECK, hw->caps);

		set_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, hw->caps);

		set_bit(I40E_HW_CAP_GENEVE_OFFLOAD, hw->caps);

		set_bit(I40E_HW_CAP_PTP_L4, hw->caps);

		set_bit(I40E_HW_CAP_WOL_MC_MAGIC_PKT_WAKE, hw->caps);

		set_bit(I40E_HW_CAP_OUTER_UDP_CSUM, hw->caps);



		if (rd32(hw, I40E_GLQF_FDEVICTENA(1)) !=

		    I40E_FDEVICT_PCTYPE_DEFAULT) {

			hw_warn(hw, "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");

			clear_bit(I40E_HW_CAP_ATR_EVICT, hw->caps);

		}



		if (aq->api_maj_ver > 1 ||

		    (aq->api_maj_ver == 1 &&
@@ -553,6 +595,12 @@ static void i40e_set_hw_caps(struct i40e_hw *hw) 
	     aq->api_min_ver >= 5))

		set_bit(I40E_HW_CAP_NVM_READ_REQUIRES_LOCK, hw->caps);



	/* The ability to RX (not drop) 802.1ad frames was added in API 1.7 */

	if (aq->api_maj_ver > 1 ||

	    (aq->api_maj_ver == 1 &&

	     aq->api_min_ver >= 7))

		set_bit(I40E_HW_CAP_802_1AD, hw->caps);



	if (aq->api_maj_ver > 1 ||

	    (aq->api_maj_ver == 1 &&

	     aq->api_min_ver >= 8))
@@ -646,24 +694,6 @@ int i40e_init_adminq(struct i40e_hw *hw) 
			   &oem_lo);

	hw->nvm.oem_ver = ((u32)oem_hi << 16) | oem_lo;



	if (hw->mac.type == I40E_MAC_XL710 &&

	    hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&

	    hw->aq.api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710) {

		set_bit(I40E_HW_CAP_AQ_PHY_ACCESS, hw->caps);

		set_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, hw->caps);

	}

	if (hw->mac.type == I40E_MAC_X722 &&

	    hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&

	    hw->aq.api_min_ver >= I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722) {

		set_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, hw->caps);

	}



	/* The ability to RX (not drop) 802.1ad frames was added in API 1.7 */

	if (hw->aq.api_maj_ver > 1 ||

	    (hw->aq.api_maj_ver == 1 &&

	     hw->aq.api_min_ver >= 7))

		set_bit(I40E_HW_CAP_802_1AD, hw->caps);



	if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) {

		ret_code = -EIO;

		goto init_adminq_free_arq;

drivers/net/ethernet/intel/i40e/i40e_debug.h

+1 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ struct i40e_hw; 
struct device *i40e_hw_to_dev(struct i40e_hw *hw);



#define hw_dbg(hw, S, A...) dev_dbg(i40e_hw_to_dev(hw), S, ##A)

#define hw_warn(hw, S, A...) dev_warn(i40e_hw_to_dev(hw), S, ##A)



#define i40e_debug(h, m, s, ...)				\

do {								\

drivers/net/ethernet/intel/i40e/i40e_main.c

+1 −54
Original line number Diff line number Diff line
@@ -12782,62 +12782,10 @@ static int i40e_sw_init(struct i40e_pf *pf) 
				 pf->hw.func_caps.fd_filters_best_effort;

	}



	if (pf->hw.mac.type == I40E_MAC_X722) {

		set_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps);

		set_bit(I40E_HW_CAP_128_QP_RSS, pf->hw.caps);

		set_bit(I40E_HW_CAP_ATR_EVICT, pf->hw.caps);

		set_bit(I40E_HW_CAP_WB_ON_ITR, pf->hw.caps);

		set_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE, pf->hw.caps);

		set_bit(I40E_HW_CAP_NO_PCI_LINK_CHECK, pf->hw.caps);

		set_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, pf->hw.caps);

		set_bit(I40E_HW_CAP_GENEVE_OFFLOAD, pf->hw.caps);

		set_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps);

		set_bit(I40E_HW_CAP_WOL_MC_MAGIC_PKT_WAKE, pf->hw.caps);

		set_bit(I40E_HW_CAP_OUTER_UDP_CSUM, pf->hw.caps);



#define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03

		if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=

		    I40E_FDEVICT_PCTYPE_DEFAULT) {

			dev_warn(&pf->pdev->dev,

				 "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");

			clear_bit(I40E_HW_CAP_ATR_EVICT, pf->hw.caps);

		}

	} else if ((pf->hw.aq.api_maj_ver > 1) ||

		   ((pf->hw.aq.api_maj_ver == 1) &&

		    (pf->hw.aq.api_min_ver > 4))) {

		/* Supported in FW API version higher than 1.4 */

		set_bit(I40E_HW_CAP_GENEVE_OFFLOAD, pf->hw.caps);

	}



	/* Enable HW ATR eviction if possible */

	if (test_bit(I40E_HW_CAP_ATR_EVICT, pf->hw.caps))

		set_bit(I40E_FLAG_HW_ATR_EVICT_ENA, pf->flags);



	if ((pf->hw.mac.type == I40E_MAC_XL710) &&

	    (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||

	    (pf->hw.aq.fw_maj_ver < 4))) {

		set_bit(I40E_HW_CAP_RESTART_AUTONEG, pf->hw.caps);

		/* No DCB support  for FW < v4.33 */

		set_bit(I40E_HW_CAP_NO_DCB_SUPPORT, pf->hw.caps);

	}



	/* Disable FW LLDP if FW < v4.3 */

	if ((pf->hw.mac.type == I40E_MAC_XL710) &&

	    (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||

	    (pf->hw.aq.fw_maj_ver < 4)))

		set_bit(I40E_HW_CAP_STOP_FW_LLDP, pf->hw.caps);



	/* Use the FW Set LLDP MIB API if FW > v4.40 */

	if ((pf->hw.mac.type == I40E_MAC_XL710) &&

	    (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||

	    (pf->hw.aq.fw_maj_ver >= 5)))

		set_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, pf->hw.caps);



	/* Enable PTP L4 if FW > v6.0 */

	if (pf->hw.mac.type == I40E_MAC_XL710 &&

	    pf->hw.aq.fw_maj_ver >= 6)

		set_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps);



	if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {

		pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;

		set_bit(I40E_FLAG_VMDQ_ENA, pf->flags);
@@ -12855,8 +12803,7 @@ static int i40e_sw_init(struct i40e_pf *pf) 
	 * if NPAR is functioning so unset this hw flag in this case.

	 */

	if (pf->hw.mac.type == I40E_MAC_XL710 &&

	    pf->hw.func_caps.npar_enable &&

	    test_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, pf->hw.caps))

	    pf->hw.func_caps.npar_enable)

		clear_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, pf->hw.caps);



#ifdef CONFIG_PCI_IOV

drivers/net/ethernet/intel/i40e/i40e_register.h

+1 −0
Original line number Diff line number Diff line
@@ -899,6 +899,7 @@ 
#define I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT 7

#define I40E_GLQF_ORT_FLX_PAYLOAD_MASK I40E_MASK(0x1, I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT)

#define I40E_GLQF_FDEVICTENA(_i) (0x00270384 + ((_i) * 4)) /* _i=0...1 */ /* Reset: CORER */

#define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03

/* Redefined for X722 family */

#define I40E_GLGEN_STAT_CLEAR 0x00390004 /* Reset: CORER */

#endif /* _I40E_REGISTER_H_ */