Commit 8d01f741 authored by William Qiu's avatar William Qiu Committed by Conor Dooley
Browse files

riscv: dts: starfive: jh7110: Add PWM node and pins configuration 



Add OpenCores PWM controller node and add PWM pins configuration
on VisionFive 2 board.

Signed-off-by: default avatarWilliam Qiu <william.qiu@starfivetech.com>
Reviewed-by: default avatarEmil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
parent 5e598b99

arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -323,6 +323,12 @@ reserved-data@600000 { 
	};

};



&pwm {

	pinctrl-names = "default";

	pinctrl-0 = <&pwm_pins>;

	status = "okay";

};



&spi0 {

	pinctrl-names = "default";

	pinctrl-0 = <&spi0_pins>;
@@ -513,6 +519,22 @@ GPOEN_ENABLE, 
		};

	};



	pwm_pins: pwm-0 {

		pwm-pins {

			pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,

					      GPOEN_SYS_PWM0_CHANNEL0,

					      GPI_NONE)>,

				 <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,

					      GPOEN_SYS_PWM0_CHANNEL1,

					      GPI_NONE)>;

			bias-disable;

			drive-strength = <12>;

			input-disable;

			input-schmitt-disable;

			slew-rate = <0>;

		};

	};



	spi0_pins: spi0-0 {

		mosi-pins {

			pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,

arch/riscv/boot/dts/starfive/jh7110.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -829,6 +829,15 @@ i2stx1: i2s@120c0000 { 
			status = "disabled";

		};



		pwm: pwm@120d0000 {

			compatible = "starfive,jh7110-pwm", "opencores,pwm-v1";

			reg = <0x0 0x120d0000 0x0 0x10000>;

			clocks = <&syscrg JH7110_SYSCLK_PWM_APB>;

			resets = <&syscrg JH7110_SYSRST_PWM_APB>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		sfctemp: temperature-sensor@120e0000 {

			compatible = "starfive,jh7110-temp";

			reg = <0x0 0x120e0000 0x0 0x10000>;