Commit 8d2ad056 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.16-2025-07-17' of... 

Merge tag 'amd-drm-fixes-6.16-2025-07-17' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.16-2025-07-17:

amdgpu:
- Fix a DC memory leak
- DCN 4.0.1 degamma LUT fix
- Fix reset counter handling for soft recovery
- GC 8 fix

radeon:
- Drop console locks when suspending/resuming

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://lore.kernel.org/r/20250717171935.642380-1-alexander.deucher@amd.com
parents fbefd8ad 83261934

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

+7 −2
Original line number Diff line number Diff line
@@ -427,6 +427,7 @@ bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid, 
{

	unsigned long flags;

	ktime_t deadline;

	bool ret;



	if (unlikely(ring->adev->debug_disable_soft_recovery))

		return false;
@@ -441,12 +442,16 @@ bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid, 
		dma_fence_set_error(fence, -ENODATA);

	spin_unlock_irqrestore(fence->lock, flags);



	atomic_inc(&ring->adev->gpu_reset_counter);

	while (!dma_fence_is_signaled(fence) &&

	       ktime_to_ns(ktime_sub(deadline, ktime_get())) > 0)

		ring->funcs->soft_recovery(ring, vmid);



	return dma_fence_is_signaled(fence);

	ret = dma_fence_is_signaled(fence);

	/* increment the counter only if soft reset worked */

	if (ret)

		atomic_inc(&ring->adev->gpu_reset_counter);



	return ret;

}



/*

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+1 −0
Original line number Diff line number Diff line
@@ -4640,6 +4640,7 @@ static int gfx_v8_0_kcq_init_queue(struct amdgpu_ring *ring) 
			memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct vi_mqd_allocation));

		/* reset ring buffer */

		ring->wptr = 0;

		atomic64_set((atomic64_t *)ring->wptr_cpu_addr, 0);

		amdgpu_ring_clear_ring(ring);

	}

	return 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

+10 −1
Original line number Diff line number Diff line
@@ -728,7 +728,16 @@ int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm, 
	 * support programmable degamma anywhere.

	 */

	is_dcn = dm->adev->dm.dc->caps.color.dpp.dcn_arch;

	drm_crtc_enable_color_mgmt(&acrtc->base, is_dcn ? MAX_COLOR_LUT_ENTRIES : 0,

	/* Dont't enable DRM CRTC degamma property for DCN401 since the

	 * pre-blending degamma LUT doesn't apply to cursor, and therefore

	 * can't work similar to a post-blending degamma LUT as in other hw

	 * versions.

	 * TODO: revisit it once KMS plane color API is merged.

	 */

	drm_crtc_enable_color_mgmt(&acrtc->base,

				   (is_dcn &&

				    dm->adev->dm.dc->ctx->dce_version != DCN_VERSION_4_01) ?

				     MAX_COLOR_LUT_ENTRIES : 0,

				   true, MAX_COLOR_LUT_ENTRIES);



	drm_mode_crtc_set_gamma_size(&acrtc->base, MAX_COLOR_LEGACY_LUT_ENTRIES);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

+2 −1
Original line number Diff line number Diff line
@@ -1565,7 +1565,7 @@ struct clk_mgr_internal *dcn401_clk_mgr_construct( 
	clk_mgr->base.bw_params = kzalloc(sizeof(*clk_mgr->base.bw_params), GFP_KERNEL);

	if (!clk_mgr->base.bw_params) {

		BREAK_TO_DEBUGGER();

		kfree(clk_mgr);

		kfree(clk_mgr401);

		return NULL;

	}
@@ -1576,6 +1576,7 @@ struct clk_mgr_internal *dcn401_clk_mgr_construct( 
	if (!clk_mgr->wm_range_table) {

		BREAK_TO_DEBUGGER();

		kfree(clk_mgr->base.bw_params);

		kfree(clk_mgr401);

		return NULL;

	}

drivers/gpu/drm/radeon/radeon_device.c

+6 −17
Original line number Diff line number Diff line
@@ -26,7 +26,6 @@ 
 *          Jerome Glisse

 */



#include <linux/console.h>

#include <linux/efi.h>

#include <linux/pci.h>

#include <linux/pm_runtime.h>
@@ -1635,11 +1634,9 @@ int radeon_suspend_kms(struct drm_device *dev, bool suspend, 
		pci_set_power_state(pdev, PCI_D3hot);

	}



	if (notify_clients) {

		console_lock();

		drm_client_dev_suspend(dev, true);

		console_unlock();

	}

	if (notify_clients)

		drm_client_dev_suspend(dev, false);



	return 0;

}
@@ -1661,18 +1658,12 @@ int radeon_resume_kms(struct drm_device *dev, bool resume, bool notify_clients) 
	if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)

		return 0;



	if (notify_clients) {

		console_lock();

	}

	if (resume) {

		pci_set_power_state(pdev, PCI_D0);

		pci_restore_state(pdev);

		if (pci_enable_device(pdev)) {

			if (notify_clients)

				console_unlock();

		if (pci_enable_device(pdev))

			return -1;

	}

	}

	/* resume AGP if in use */

	radeon_agp_resume(rdev);

	radeon_resume(rdev);
@@ -1747,10 +1738,8 @@ int radeon_resume_kms(struct drm_device *dev, bool resume, bool notify_clients) 
	if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled)

		radeon_pm_compute_clocks(rdev);



	if (notify_clients) {

		drm_client_dev_resume(dev, true);

		console_unlock();

	}

	if (notify_clients)

		drm_client_dev_resume(dev, false);



	return 0;

}