Commit 8d74ce4e authored May 14, 2025 by Mangesh Gadre Committed by Alex Deucher May 22, 2025

drm/amdgpu: Add jpeg poison status reg



added registers to enable jpeg ras

Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 5035caf1

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_offset.h

+4 −0

Original line number	Diff line number	Diff line
		@@ -1070,6 +1070,10 @@
		#define regUVD_RAS_VCPU_VCODEC_STATUS 0x0057
		#define regUVD_RAS_VCPU_VCODEC_STATUS_BASE_IDX 1
		#define regUVD_SCRATCH15 0x005c
		#define regUVD_RAS_JPEG0_STATUS 0x0059
		#define regUVD_RAS_JPEG0_STATUS_BASE_IDX 1
		#define regUVD_RAS_JPEG1_STATUS 0x005a
		#define regUVD_RAS_JPEG1_STATUS_BASE_IDX 1
		#define regUVD_SCRATCH15_BASE_IDX 1
		#define regUVD_VERSION 0x005d
		#define regUVD_VERSION_BASE_IDX 1

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h

+10 −0

Original line number	Diff line number	Diff line
		@@ -5720,6 +5720,16 @@
		#define UVD_RAS_VCPU_VCODEC_STATUS__POISONED_VF_MASK 0x7FFFFFFFL
		#define UVD_RAS_VCPU_VCODEC_STATUS__POISONED_PF_MASK 0x80000000L

		//UVD_RAS_JPEG0_STATUS
		#define UVD_RAS_JPEG0_STATUS__POISONED_VF__SHIFT 0x0
		#define UVD_RAS_JPEG0_STATUS__POISONED_PF__SHIFT 0x1f
		#define UVD_RAS_JPEG0_STATUS__POISONED_VF_MASK 0x7FFFFFFFL
		#define UVD_RAS_JPEG0_STATUS__POISONED_PF_MASK 0x80000000L
		//UVD_RAS_JPEG1_STATUS
		#define UVD_RAS_JPEG1_STATUS__POISONED_VF__SHIFT 0x0
		#define UVD_RAS_JPEG1_STATUS__POISONED_PF__SHIFT 0x1f
		#define UVD_RAS_JPEG1_STATUS__POISONED_VF_MASK 0x7FFFFFFFL
		#define UVD_RAS_JPEG1_STATUS__POISONED_PF_MASK 0x80000000L
		//UVD_SCRATCH15
		#define UVD_SCRATCH15__SCRATCH15_DATA__SHIFT 0x0
		#define UVD_SCRATCH15__SCRATCH15_DATA_MASK 0xFFFFFFFFL