Commit 8e38e08f authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Jakub Kicinski
Browse files

net: airoha: fix PSE memory configuration in airoha_fe_pse_ports_init() 



Align PSE memory configuration to vendor SDK. In particular, increase
initial value of PSE reserved memory in airoha_fe_pse_ports_init()
routine by the value used for the second Packet Processor Engine (PPE2)
and do not overwrite the default value.

Introduced by commit 23020f04 ("net: airoha: Introduce ethernet support
for EN7581 SoC")

Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Link: https://patch.msgid.link/20241001-airoha-eth-pse-fix-v2-2-9a56cdffd074@kernel.org


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 1f3e7ff4

drivers/net/ethernet/mediatek/airoha_eth.c

+4 −2
Original line number Diff line number Diff line
@@ -1172,11 +1172,13 @@ static void airoha_fe_pse_ports_init(struct airoha_eth *eth) 
		[FE_PSE_PORT_GDM4] = 2,

		[FE_PSE_PORT_CDM5] = 2,

	};

	u32 all_rsv;

	int q;



	all_rsv = airoha_fe_get_pse_all_rsv(eth);

	/* hw misses PPE2 oq rsv */

	airoha_fe_set(eth, REG_FE_PSE_BUF_SET,

		      PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2]);

	all_rsv += PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2];

	airoha_fe_set(eth, REG_FE_PSE_BUF_SET, all_rsv);



	/* CMD1 */

	for (q = 0; q < pse_port_num_queues[FE_PSE_PORT_CDM1]; q++)