Commit 8fcc3f7d authored by Peter Korsgaard's avatar Peter Korsgaard Committed by Vinod Koul
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dmaengine: xilinx_dma: check for invalid vdma interleaved parameters



The VDMA HSIZE register (corresponding to sgl[0].size) is only 16bit wide /
the VSIZE register (corresponding to numf) is only 13bit wide, so reject
requests not fitting within that rather than silently transferring too
little data.

Signed-off-by: default avatarPeter Korsgaard <peter@korsgaard.com>
Reviewed-by: default avatarRadhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Link: https://lore.kernel.org/r/20240105105956.1370220-1-peter@korsgaard.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 33b7db45
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+6 −0
Original line number Diff line number Diff line
@@ -112,7 +112,9 @@

/* Register Direct Mode Registers */
#define XILINX_DMA_REG_VSIZE			0x0000
#define XILINX_DMA_VSIZE_MASK			GENMASK(12, 0)
#define XILINX_DMA_REG_HSIZE			0x0004
#define XILINX_DMA_HSIZE_MASK			GENMASK(15, 0)

#define XILINX_DMA_REG_FRMDLY_STRIDE		0x0008
#define XILINX_DMA_FRMDLY_STRIDE_FRMDLY_SHIFT	24
@@ -2050,6 +2052,10 @@ xilinx_vdma_dma_prep_interleaved(struct dma_chan *dchan,
	if (!xt->numf || !xt->sgl[0].size)
		return NULL;

	if (xt->numf & ~XILINX_DMA_VSIZE_MASK ||
	    xt->sgl[0].size & ~XILINX_DMA_HSIZE_MASK)
		return NULL;

	if (xt->frame_size != 1)
		return NULL;