Unverified Commit 902300d3 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'arm-soc/for-6.19/devicetree-arm64-fixes' of...

Merge tag 'arm-soc/for-6.19/devicetree-arm64-fixes' of https://github.com/Broadcom/stblinux into arm/fixes

This pull request contains Broadcom ARM64-SoC Device Tree fixes for
6.19, please pull the following:

- Andrea fixes the RP1 DeviceTree hierarchy and drop overlay support,
  this resolves a number of DTC warnings and other issues

* tag 'arm-soc/for-6.19/devicetree-arm64-fixes' of https://github.com/Broadcom/stblinux

:
  arm64: dts: broadcom: rp1: drop RP1 overlay
  arm64: dts: broadcom: bcm2712: fix RP1 endpoint PCI topology
  misc: rp1: drop overlay support
  dt-bindings: misc: pci1de4,1: add required reg property for endpoint

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents c4c6db7a 9a96cc8b
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+7 −1
Original line number Diff line number Diff line
@@ -25,6 +25,10 @@ properties:
    items:
      - const: pci1de4,1

  reg:
    maxItems: 1
    description: The PCI Bus-Device-Function address.

  '#interrupt-cells':
    const: 2
    description: |
@@ -101,6 +105,7 @@ unevaluatedProperties: false

required:
  - compatible
  - reg
  - '#interrupt-cells'
  - interrupt-controller
  - pci-ep-bus@1
@@ -111,8 +116,9 @@ examples:
        #address-cells = <3>;
        #size-cells = <2>;

        rp1@0,0 {
        dev@0,0 {
            compatible = "pci1de4,1";
            reg = <0x10000 0x0 0x0 0x0 0x0>;
            ranges = <0x01 0x00 0x00000000  0x82010000 0x00 0x00  0x00 0x400000>;
            #address-cells = <3>;
            #size-cells = <2>;
+1 −3
Original line number Diff line number Diff line
@@ -7,15 +7,13 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \
			      bcm2711-rpi-4-b.dtb \
			      bcm2711-rpi-cm4-io.dtb \
			      bcm2712-rpi-5-b.dtb \
			      bcm2712-rpi-5-b-ovl-rp1.dtb \
			      bcm2712-d-rpi-5-b.dtb \
			      bcm2837-rpi-2-b.dtb \
			      bcm2837-rpi-3-a-plus.dtb \
			      bcm2837-rpi-3-b.dtb \
			      bcm2837-rpi-3-b-plus.dtb \
			      bcm2837-rpi-cm3-io3.dtb \
			      bcm2837-rpi-zero-2-w.dtb \
			      rp1.dtbo
			      bcm2837-rpi-zero-2-w.dtb

subdir-y	+= bcmbca
subdir-y	+= northstar2
+26 −13
Original line number Diff line number Diff line
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * bcm2712-rpi-5-b-ovl-rp1.dts is the overlay-ready DT which will make
 * the RP1 driver to load the RP1 dtb overlay at runtime, while
 * bcm2712-rpi-5-b.dts (this file) is the fully defined one (i.e. it
 * already contains RP1 node, so no overlay is loaded nor needed).
 * This file is intended to host the override nodes for the RP1 peripherals,
 * e.g. to declare the phy of the ethernet interface or the custom pin setup
 * for several RP1 peripherals.
 * This in turn is due to the fact that there's no current generic
 * infrastructure to reference nodes (i.e. the nodes in rp1-common.dtsi) that
 * are not yet defined in the DT since they are loaded at runtime via overlay.
 * As a loose attempt to separate RP1 customizations from SoC peripherals
 * definitioni, this file is intended to host the override nodes for the RP1
 * peripherals, e.g. to declare the phy of the ethernet interface or custom
 * pin setup.
 * All other nodes that do not have anything to do with RP1 should be added
 * to the included bcm2712-rpi-5-b-ovl-rp1.dts instead.
 * to the included bcm2712-rpi-5-b-base.dtsi instead.
 */

/dts-v1/;

#include "bcm2712-rpi-5-b-ovl-rp1.dts"
#include "bcm2712-rpi-5-b-base.dtsi"

/ {
	aliases {
@@ -25,7 +19,26 @@ aliases {
};

&pcie2 {
	#include "rp1-nexus.dtsi"
	pci@0,0 {
		reg = <0x0 0x0 0x0 0x0 0x0>;
		ranges;
		bus-range = <0 1>;
		device_type = "pci";
		#address-cells = <3>;
		#size-cells = <2>;

		dev@0,0 {
			compatible = "pci1de4,1";
			reg = <0x10000 0x0 0x0 0x0 0x0>;
			ranges = <0x1 0x0 0x0 0x82010000 0x0 0x0 0x0 0x400000>;
			interrupt-controller;
			#interrupt-cells = <2>;
			#address-cells = <3>;
			#size-cells = <2>;

			#include "rp1-common.dtsi"
		};
	};
};

&rp1_eth {
+0 −14
Original line number Diff line number Diff line
// SPDX-License-Identifier: (GPL-2.0 OR MIT)

rp1_nexus {
	compatible = "pci1de4,1";
	#address-cells = <3>;
	#size-cells = <2>;
	ranges = <0x01 0x00 0x00000000
		  0x02000000 0x00 0x00000000
		  0x0 0x400000>;
	interrupt-controller;
	#interrupt-cells = <2>;

	#include "rp1-common.dtsi"
};
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