Commit 9217f9aa authored by Mitul Golani's avatar Mitul Golani Committed by Ankit Nautiyal
Browse files

drm/i915/scaler: Compute scaling factors for pipe scaler 



Compute scaling factors and scaler user for pipe scaler if
particular scaler user is pipe scaler.

--v2:
- Fix typos. [Ankit]
- Remove FIXME tag. [Ankit]
- Should be common hscale, vscale instead of local one to
avoid garbage overwritten.

--v3:
- Separate out max_scaling information. [Ankit]
- Use max_hscale and max_vscale info instead of INT_MAX. [Ankit]

--v4:
- Add Suggested changes reported by Dan Carpenter.

Signed-off-by: default avatarMitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: default avatarAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: default avatarAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250121175856.447245-1-mitulkumar.ajitkumar.golani@intel.com
parent cabb162f

drivers/gpu/drm/i915/display/skl_scaler.c

+32 −7
Original line number Diff line number Diff line
@@ -368,6 +368,8 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, 
					&crtc_state->scaler_state;

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	u32 mode;

	int hscale = 0;

	int vscale = 0;



	if (*scaler_id < 0)

		*scaler_id = intel_allocate_scaler(scaler_state, crtc);
@@ -416,15 +418,11 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, 
		mode = SKL_PS_SCALER_MODE_DYN;

	}



	/*

	 * FIXME: we should also check the scaler factors for pfit, so

	 * this shouldn't be tied directly to planes.

	 */

	if (plane_state && plane_state->hw.fb) {

		const struct drm_framebuffer *fb = plane_state->hw.fb;

		const struct drm_rect *src = &plane_state->uapi.src;

		const struct drm_rect *dst = &plane_state->uapi.dst;

		int hscale, vscale, max_vscale, max_hscale;

		int max_hscale, max_vscale;



		calculate_max_scale(crtc,

				    intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier),
@@ -448,10 +446,37 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, 


			return -EINVAL;

		}

	}



	if (crtc_state->pch_pfit.enabled) {

		struct drm_rect src;

		int max_hscale, max_vscale;



		drm_rect_init(&src, 0, 0,

			      drm_rect_width(&crtc_state->pipe_src) << 16,

			      drm_rect_height(&crtc_state->pipe_src) << 16);



		calculate_max_scale(crtc, 0, *scaler_id,

				    &max_hscale, &max_vscale);



		hscale = drm_rect_calc_hscale(&src, &crtc_state->pch_pfit.dst,

					      0, max_hscale);

		vscale = drm_rect_calc_vscale(&src, &crtc_state->pch_pfit.dst,

					      0, max_vscale);



		if (hscale < 0 || vscale < 0) {

			drm_dbg_kms(display->drm,

				    "Scaler %d doesn't support required pipe scaling\n",

				    *scaler_id);

			drm_rect_debug_print("src: ", &src, true);

			drm_rect_debug_print("dst: ", &crtc_state->pch_pfit.dst, false);



			return -EINVAL;

		}

	}



	scaler_state->scalers[*scaler_id].hscale = hscale;

	scaler_state->scalers[*scaler_id].vscale = vscale;

	}



	drm_dbg_kms(display->drm, "[CRTC:%d:%s] attached scaler id %u.%u to %s:%d\n",

		    crtc->base.base.id, crtc->base.name,